Hi Sibi,
On Tue, 2021-04-27 at 13:03 +0530, Sibi Sankar wrote:
Add PDC Global reset signals for Wireless Processor Subsystem (WPSS)[...]
on SC7280 SoCs.
Signed-off-by: Sibi Sankar <sibis@xxxxxxxxxxxxxx>
---
v2:
* place resets and num_resets adjacent to each other [Stephen]
+struct qcom_pdc_reset_desc {[...]
+ const struct qcom_pdc_reset_map *resets;
+ size_t num_resets;
+ unsigned int offset;
+};
For consistency, please do the same here:
+static const struct qcom_pdc_reset_desc sdm845_pdc_reset_desc = {[...]
+ .resets = sdm845_pdc_resets,
+ .offset = RPMH_SDM845_PDC_SYNC_RESET,
+ .num_resets = ARRAY_SIZE(sdm845_pdc_resets),
+};
and here:
+static const struct qcom_pdc_reset_desc sc7280_pdc_reset_desc = {
+ .resets = sc7280_pdc_resets,
+ .offset = RPMH_SC7280_PDC_SYNC_RESET,
+ .num_resets = ARRAY_SIZE(sc7280_pdc_resets),
+};
[...]
@@ -54,19 +89,18 @@ static int qcom_pdc_control_assert(struct reset_controller_dev *rcdev,
unsigned long idx)
{
struct qcom_pdc_reset_data *data = to_qcom_pdc_reset_data(rcdev);
+ const struct qcom_pdc_reset_map *map = &data->desc->resets[idx];
- return regmap_update_bits(data->regmap, RPMH_PDC_SYNC_RESET,
- BIT(sdm845_pdc_resets[idx].bit),
- BIT(sdm845_pdc_resets[idx].bit));
+ return regmap_update_bits(data->regmap, data->desc->offset, BIT(map->bit), BIT(map->bit));
}
Why not go one step further:
u32 mask = BIT(data->desc->resets[idx].bit);
return regmap_update_bits(data->regmap, data->desc->offset, mask, mask);
That seems to be a common pattern in other qcom drivers.
Either way, with the above reset/num_reset changes:
Reviewed-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
Also,
Acked-by: Philipp Zabel <p.zabel@xxxxxxxxxxxxxx>
for the whole series to go through the qcom tree, or let me know if you
want me to pick up patches 2-4 next round.
regards
Philipp