Re: [PATCH v5 09/20] drm/bridge: ti-sn65dsi86: Break GPIO and MIPI-to-eDP bridge into sub-drivers

From: Doug Anderson
Date: Mon May 03 2021 - 13:08:03 EST


Hi,

On Sat, May 1, 2021 at 4:59 AM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
>
> On Fri, Apr 23, 2021 at 6:59 PM Douglas Anderson <dianders@xxxxxxxxxxxx> wrote:
>
> > Let's use the newly minted aux bus to break up the driver into sub
> > drivers. We're not doing a full breakup here: all the code is still in
> > the same file and remains largely untouched. The big goal here of
> > using sub-drivers is to allow part of our code to finish probing even
> > if some other code needs to defer. This can solve some chicken-and-egg
> > problems. Specifically:
> > - In commit 48834e6084f1 ("drm/panel-simple: Support hpd-gpios for
> > delaying prepare()") we had to add a bit of a hack to simpel-panel
> > to support HPD showing up late. We can get rid of that hack now
> > since the GPIO part of our driver can finish probing early.
> > - We have a desire to expose our DDC bus to simple-panel (and perhaps
> > to a backlight driver?). That will end up with the same
> > chicken-and-egg problem. A future patch to move this to a sub-driver
> > will fix it.
> > - If/when we support the PWM functionality present in the bridge chip
> > for a backlight we'll end up with another chicken-and-egg
> > problem. If we allow the PWM to be a sub-driver too then it solves
> > this problem.
> >
> > Signed-off-by: Douglas Anderson <dianders@xxxxxxxxxxxx>
> > ---
> >
> > Changes in v5:
> > - Fix module compile problems (Bjorn + kbuild bot)
> > - Remove useless MODULE_DEVICE_TABLE (Bjorn).
>
> This is generally a good idea. I have no idea when to use
> auxbus or MFD

It was a bit hard for me to figure out too. I think historically this
could have been implemented by MFD but I believe that the point of
introducing the AUX bus was that MFD wasn't a great fit for things
like this. It's talked about a bit in
"Documentation/driver-api/auxiliary_bus.rst". For me the important
thing here is that we think of the bridge chip as one device, not a
collection of IP blocks glued together in one package. As some
evidence, the DT bindings don't have sub-nodes for this. There's a
single DT node that says that this one device is the bridge, is a GPIO
controller, and can provide a PWM.


> but I trust that you researched that so:
> Acked-by: Linus Walleij <linus.walleij@xxxxxxxxxx>

Thanks! I'll land it then to whittle the patch stack down to just the
controversial EDID one.

-Doug