Re: [PATCH v7 1/7] MAINTAINERS: Add Advantech AHC1EC0 embedded controller entry

[Andy Shevchenko]

On Thu, May 6, 2021 at 11:48 AM Hans de Goede <hdegoede@xxxxxxxxxx> wrote:
> I'm replying here since this series has no cover-letter, for
> the next version for a series touching so many different
> sub-systems it would be good to start with a cover-letter
> providing some background info on the series.
>
> I see this is binding to an ACPI device, yet it is also using
> devicetree bindings and properties.
>
> So I take it this means that your ACPI tables are using the
> optional capability of embedded device-tree blobs inside the
> ACPI tables ?
>
> That is an unusual combination on a x86 device, note it is
> not wrong

It's actually not okay. We have agreed at some point with DT people,
that ACPI should not use non-native variants of natively supported
things. For example, it shouldn't use "interrupt" property for IOxAPIC
(or xIC) provided interrupts, rather Interrupt() has to be used and so
on.

> but AFAIK you are the first to do this on x86.

No, not the first. Once Intel tried to invent the pin control
configuration and muxing properties in ACPI, it was luckily rejected
(ACPI 6.x OTOH provides a set of special resources for that).

So, NAK from me, *if* it's really the case. ACPI tables must be revisited.

-- 
With Best Regards,
Andy Shevchenko