Re: [PATCH] ASoC: cs42l42: make HSBIAS_SENSE_EN optional

From: kernel test robot
Date: Fri May 07 2021 - 14:14:32 EST


Hi Lucas,

Thank you for the patch! Yet something to improve:

[auto build test ERROR on asoc/for-next]
[also build test ERROR on next-20210507]
[cannot apply to v5.12]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url: https://github.com/0day-ci/linux/commits/Lucas-Tanure/ASoC-cs42l42-make-HSBIAS_SENSE_EN-optional/20210507-221954
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: arc-randconfig-s031-20210506 (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# apt-get install sparse
# sparse version: v0.6.3-341-g8af24329-dirty
# https://github.com/0day-ci/linux/commit/17dc415a57a00d44b8be8db4791a2843daee7db1
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Lucas-Tanure/ASoC-cs42l42-make-HSBIAS_SENSE_EN-optional/20210507-221954
git checkout 17dc415a57a00d44b8be8db4791a2843daee7db1
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__' W=1 ARCH=arc

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

sound/soc/codecs/cs42l42.c: In function 'cs42l42_handle_device_data':
>> sound/soc/codecs/cs42l42.c:1812:33: error: 'dev' undeclared (first use in this function); did you mean 'cdev'?
1812 | ret = device_property_read_u32(dev, "cirrus,hs-bias-sense-en", &val);
| ^~~
| cdev
sound/soc/codecs/cs42l42.c:1812:33: note: each undeclared identifier is reported only once for each function it appears in


vim +1812 sound/soc/codecs/cs42l42.c

1632
1633 static int cs42l42_handle_device_data(struct i2c_client *i2c_client,
1634 struct cs42l42_private *cs42l42)
1635 {
1636 struct device_node *np = i2c_client->dev.of_node;
1637 unsigned int val;
1638 unsigned int thresholds[CS42L42_NUM_BIASES];
1639 int ret;
1640 int i;
1641
1642 ret = of_property_read_u32(np, "cirrus,ts-inv", &val);
1643
1644 if (!ret) {
1645 switch (val) {
1646 case CS42L42_TS_INV_EN:
1647 case CS42L42_TS_INV_DIS:
1648 cs42l42->ts_inv = val;
1649 break;
1650 default:
1651 dev_err(&i2c_client->dev,
1652 "Wrong cirrus,ts-inv DT value %d\n",
1653 val);
1654 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1655 }
1656 } else {
1657 cs42l42->ts_inv = CS42L42_TS_INV_DIS;
1658 }
1659
1660 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1661 CS42L42_TS_INV_MASK,
1662 (cs42l42->ts_inv << CS42L42_TS_INV_SHIFT));
1663
1664 ret = of_property_read_u32(np, "cirrus,ts-dbnc-rise", &val);
1665
1666 if (!ret) {
1667 switch (val) {
1668 case CS42L42_TS_DBNCE_0:
1669 case CS42L42_TS_DBNCE_125:
1670 case CS42L42_TS_DBNCE_250:
1671 case CS42L42_TS_DBNCE_500:
1672 case CS42L42_TS_DBNCE_750:
1673 case CS42L42_TS_DBNCE_1000:
1674 case CS42L42_TS_DBNCE_1250:
1675 case CS42L42_TS_DBNCE_1500:
1676 cs42l42->ts_dbnc_rise = val;
1677 break;
1678 default:
1679 dev_err(&i2c_client->dev,
1680 "Wrong cirrus,ts-dbnc-rise DT value %d\n",
1681 val);
1682 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1683 }
1684 } else {
1685 cs42l42->ts_dbnc_rise = CS42L42_TS_DBNCE_1000;
1686 }
1687
1688 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1689 CS42L42_TS_RISE_DBNCE_TIME_MASK,
1690 (cs42l42->ts_dbnc_rise <<
1691 CS42L42_TS_RISE_DBNCE_TIME_SHIFT));
1692
1693 ret = of_property_read_u32(np, "cirrus,ts-dbnc-fall", &val);
1694
1695 if (!ret) {
1696 switch (val) {
1697 case CS42L42_TS_DBNCE_0:
1698 case CS42L42_TS_DBNCE_125:
1699 case CS42L42_TS_DBNCE_250:
1700 case CS42L42_TS_DBNCE_500:
1701 case CS42L42_TS_DBNCE_750:
1702 case CS42L42_TS_DBNCE_1000:
1703 case CS42L42_TS_DBNCE_1250:
1704 case CS42L42_TS_DBNCE_1500:
1705 cs42l42->ts_dbnc_fall = val;
1706 break;
1707 default:
1708 dev_err(&i2c_client->dev,
1709 "Wrong cirrus,ts-dbnc-fall DT value %d\n",
1710 val);
1711 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
1712 }
1713 } else {
1714 cs42l42->ts_dbnc_fall = CS42L42_TS_DBNCE_0;
1715 }
1716
1717 regmap_update_bits(cs42l42->regmap, CS42L42_TSENSE_CTL,
1718 CS42L42_TS_FALL_DBNCE_TIME_MASK,
1719 (cs42l42->ts_dbnc_fall <<
1720 CS42L42_TS_FALL_DBNCE_TIME_SHIFT));
1721
1722 ret = of_property_read_u32(np, "cirrus,btn-det-init-dbnce", &val);
1723
1724 if (!ret) {
1725 if (val <= CS42L42_BTN_DET_INIT_DBNCE_MAX)
1726 cs42l42->btn_det_init_dbnce = val;
1727 else {
1728 dev_err(&i2c_client->dev,
1729 "Wrong cirrus,btn-det-init-dbnce DT value %d\n",
1730 val);
1731 cs42l42->btn_det_init_dbnce =
1732 CS42L42_BTN_DET_INIT_DBNCE_DEFAULT;
1733 }
1734 } else {
1735 cs42l42->btn_det_init_dbnce =
1736 CS42L42_BTN_DET_INIT_DBNCE_DEFAULT;
1737 }
1738
1739 ret = of_property_read_u32(np, "cirrus,btn-det-event-dbnce", &val);
1740
1741 if (!ret) {
1742 if (val <= CS42L42_BTN_DET_EVENT_DBNCE_MAX)
1743 cs42l42->btn_det_event_dbnce = val;
1744 else {
1745 dev_err(&i2c_client->dev,
1746 "Wrong cirrus,btn-det-event-dbnce DT value %d\n", val);
1747 cs42l42->btn_det_event_dbnce =
1748 CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT;
1749 }
1750 } else {
1751 cs42l42->btn_det_event_dbnce =
1752 CS42L42_BTN_DET_EVENT_DBNCE_DEFAULT;
1753 }
1754
1755 ret = of_property_read_u32_array(np, "cirrus,bias-lvls",
1756 (u32 *)thresholds, CS42L42_NUM_BIASES);
1757
1758 if (!ret) {
1759 for (i = 0; i < CS42L42_NUM_BIASES; i++) {
1760 if (thresholds[i] <= CS42L42_HS_DET_LEVEL_MAX)
1761 cs42l42->bias_thresholds[i] = thresholds[i];
1762 else {
1763 dev_err(&i2c_client->dev,
1764 "Wrong cirrus,bias-lvls[%d] DT value %d\n", i,
1765 thresholds[i]);
1766 cs42l42->bias_thresholds[i] =
1767 threshold_defaults[i];
1768 }
1769 }
1770 } else {
1771 for (i = 0; i < CS42L42_NUM_BIASES; i++)
1772 cs42l42->bias_thresholds[i] = threshold_defaults[i];
1773 }
1774
1775 ret = of_property_read_u32(np, "cirrus,hs-bias-ramp-rate", &val);
1776
1777 if (!ret) {
1778 switch (val) {
1779 case CS42L42_HSBIAS_RAMP_FAST_RISE_SLOW_FALL:
1780 cs42l42->hs_bias_ramp_rate = val;
1781 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME0;
1782 break;
1783 case CS42L42_HSBIAS_RAMP_FAST:
1784 cs42l42->hs_bias_ramp_rate = val;
1785 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME1;
1786 break;
1787 case CS42L42_HSBIAS_RAMP_SLOW:
1788 cs42l42->hs_bias_ramp_rate = val;
1789 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
1790 break;
1791 case CS42L42_HSBIAS_RAMP_SLOWEST:
1792 cs42l42->hs_bias_ramp_rate = val;
1793 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME3;
1794 break;
1795 default:
1796 dev_err(&i2c_client->dev,
1797 "Wrong cirrus,hs-bias-ramp-rate DT value %d\n",
1798 val);
1799 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
1800 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
1801 }
1802 } else {
1803 cs42l42->hs_bias_ramp_rate = CS42L42_HSBIAS_RAMP_SLOW;
1804 cs42l42->hs_bias_ramp_time = CS42L42_HSBIAS_RAMP_TIME2;
1805 }
1806
1807 regmap_update_bits(cs42l42->regmap, CS42L42_HS_BIAS_CTL,
1808 CS42L42_HSBIAS_RAMP_MASK,
1809 (cs42l42->hs_bias_ramp_rate <<
1810 CS42L42_HSBIAS_RAMP_SHIFT));
1811
> 1812 ret = device_property_read_u32(dev, "cirrus,hs-bias-sense-en", &val);
1813 if (!ret) {
1814 switch (val) {
1815 case CS42L42_HSBIAS_SENSE_OFF:
1816 case CS42L42_HSBIAS_SENSE_ON:
1817 cs42l42->hs_bias_sense_en = val;
1818 break;
1819 default:
1820 dev_err(dev,
1821 "Wrong cirrus,hs-bias-sense-en DT value %d\n",
1822 val);
1823 cs42l42->hs_bias_sense_en = CS42L42_HSBIAS_SENSE_ON;
1824 break;
1825 }
1826 } else {
1827 cs42l42->hs_bias_sense_en = CS42L42_HSBIAS_SENSE_ON;
1828 }
1829
1830 return 0;
1831 }
1832

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

Attachment: .config.gz
Description: application/gzip