Re: Candidate Linux ABI for Intel AMX and hypothetical new related features
From: Thomas Gleixner
Date: Sat May 08 2021 - 05:45:57 EST
On Sun, May 02 2021 at 11:27, Len Brown wrote:
> On Fri, Apr 23, 2021 at 3:58 PM Borislav Petkov <bp@xxxxxxxxx> wrote:
> Here is how it works:
>
> 1. The kernel boots and sees the feature in CPUID.
>
> 2. If the kernel supports that feature, it sets XCR0[feature].
>
> For some features, there may be a bunch of kernel support,
> while simple features may require only state save/restore.
>
> 2a. If the kernel doesn't support the feature, XCR0[feature] remains cleared.
>
> 3. user-space sees the feature in CPUID
>
> 4. user-space sees for the feature via xgetbv[XCR0]
>
> 5. If the feature is enabled in XCR0, the user happily uses it.
>
> For AMX, Linux implements "transparent first use"
> so that it doesn't have to allocate 8KB context switch
> buffers for tasks that don't actually use AMX.
> It does this by arming XFD for all tasks, and taking a #NM
> to allocate a context switch buffer only for those tasks
> that actually execute AMX instructions.
>
> 5a. If the feature is not enabled in XCR0, and the tasks uses
> those instructions anway, the hardware delivers a #UD
> and the kernel kills the process with a signal.
Where is #6 which describes the signal interaction?
Thanks,
tglx