[PATCH v2 5/5] gpio: xilinx: No need to disable IRQs in the handler

From: Andy Shevchenko
Date: Mon May 10 2021 - 15:46:47 EST


In IRQ handler interrupts are already disabled, hence no need
to repeat it. Even in the threaded case, it is not a problem
because IRQ framework keeps interrupt disabled there as well.
Remove disabling IRQ part in the handler.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
Tested-by: Neeli Srinivas <sneeli@xxxxxxxxxx>
---
drivers/gpio/gpio-xilinx.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c
index d2b7458b1d69..109b32104867 100644
--- a/drivers/gpio/gpio-xilinx.c
+++ b/drivers/gpio/gpio-xilinx.c
@@ -509,14 +509,13 @@ static void xgpio_irqhandler(struct irq_desc *desc)
int irq_offset;
u32 status;
u32 bit;
- unsigned long flags;

status = xgpio_readreg(chip->regs + XGPIO_IPISR_OFFSET);
xgpio_writereg(chip->regs + XGPIO_IPISR_OFFSET, status);

chained_irq_enter(irqchip, desc);

- spin_lock_irqsave(&chip->gpio_lock, flags);
+ spin_lock(&chip->gpio_lock);

xgpio_read_ch_all(chip, XGPIO_DATA_OFFSET, all);

@@ -533,7 +532,7 @@ static void xgpio_irqhandler(struct irq_desc *desc)
bitmap_copy(chip->last_irq_read, all, 64);
bitmap_or(all, rising, falling, 64);

- spin_unlock_irqrestore(&chip->gpio_lock, flags);
+ spin_unlock(&chip->gpio_lock);

dev_dbg(gc->parent, "IRQ rising %*pb falling %*pb\n", 64, rising, 64, falling);

--
2.30.2