[PATCH v3 0/2] DDR/L3 Scaling support on SC7280 SoCs

[Sibi Sankar]

The patch series adds support for DDR/L3 Scaling on SC7280 SoCs.

V3:
 * Rename opp table nodes [Matthias]
 * Rename opp phandles [Doug]

V2:
 * Add a new opp table for cpu 7 to account for the additional frequencies
   supported by it.

Depends on the following patch series:
L3 Provider Support: https://lore.kernel.org/lkml/1618556290-28303-1-git-send-email-okukatla@xxxxxxxxxxxxxx/
CPUfreq Support: https://lore.kernel.org/lkml/1618020280-5470-2-git-send-email-tdas@xxxxxxxxxxxxxx/
RPMH Provider Support: https://lore.kernel.org/lkml/1619517059-12109-1-git-send-email-okukatla@xxxxxxxxxxxxxx/

It also depends on L3 and cpufreq dt nodes from the ^^ series to not have
overlapping memory regions.

Sibi Sankar (2):
  cpufreq: blacklist SC7280 in cpufreq-dt-platdev
  arm64: dts: qcom: sc7280: Add cpu OPP tables

 arch/arm64/boot/dts/qcom/sc7280.dtsi | 215 +++++++++++++++++++++++++++++++++++
 drivers/cpufreq/cpufreq-dt-platdev.c |   1 +
 2 files changed, 216 insertions(+)

-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project