Re: [PATCH 0/4] Map register blocks individually

[Dan Williams]

On Thu, May 6, 2021 at 3:37 PM <ira.weiny@xxxxxxxxx> wrote:
>
> From: Ira Weiny <ira.weiny@xxxxxxxxx>
>
> User space will want to map some register blocks.

The motivation is not to allow userspace access. The motivation is a
bug fix for hardware implementations that mix component and device
registers into the same BAR and the fact that the driver stack has
independent mapping implementations for those 2 cases. It is a happy
side-effect that this also allows finer grained pci-mmap exclusion.

> Currently BARs are mapped in
> their entirety and pointers to the register blocks are created into those
> mappings.  This will prevent mappings from user space.
>
> This series has 3 clean up patches followed by a patch to mapping the register
> blocks individually.
>
> Unfortunately, the information for the register blocks is contained inside the
> BARs themselves.  Which means the BAR must be mapped, probed, and unmapped
> prior to the registers being mapped individually.
>
> The probe stage creates list of register maps which is then iterated to map
> the individual register blocks.
>
> Ira Weiny (4):
>   cxl/mem: Fully decode device capability header
>   cxl/mem: Reserve all device regions at once
>   cxl/mem: Introduce cxl_decode_register_block()
>   cxl/mem: Map registers based on capabilities
>
>  drivers/cxl/core.c |  84 ++++++++++++++++++++------
>  drivers/cxl/cxl.h  |  34 +++++++++--
>  drivers/cxl/pci.c  | 147 +++++++++++++++++++++++++++++++++++----------
>  3 files changed, 211 insertions(+), 54 deletions(-)
>
> --
> 2.28.0.rc0.12.gb6a658bd00c9
>