[PATCH v1 1/1] platform/x86: Add PWM platform data for Merrifield

[Andy Shevchenko]

PWM is not functional since it requires pins to be muxed and configured
properly. Add pinctrl mapping to platform initialization code. The pins will
be configured properly whenever PWM driver is probed successfully.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
---
 drivers/platform/x86/Makefile             |  4 +++
 drivers/platform/x86/platform_mrfld_pwm.c | 37 +++++++++++++++++++++++
 2 files changed, 41 insertions(+)
 create mode 100644 drivers/platform/x86/platform_mrfld_pwm.c

diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile
index 85445148ae7b..fa0ef75b9ab3 100644
--- a/drivers/platform/x86/Makefile
+++ b/drivers/platform/x86/Makefile
@@ -143,3 +143,7 @@ obj-$(CONFIG_INTEL_TELEMETRY)		+= intel_telemetry_core.o \
 					   intel_telemetry_pltdrv.o \
 					   intel_telemetry_debugfs.o
 obj-$(CONFIG_PMC_ATOM)			+= pmc_atom.o
+
+ifneq ($(CONFIG_PINCTRL_MERRIFIELD),)
+obj-y += platform_mrfld_pwm.o
+endif
diff --git a/drivers/platform/x86/platform_mrfld_pwm.c b/drivers/platform/x86/platform_mrfld_pwm.c
new file mode 100644
index 000000000000..6d5b04076094
--- /dev/null
+++ b/drivers/platform/x86/platform_mrfld_pwm.c
@@ -0,0 +1,37 @@
+/*
+ * Intel Merrifield PWM platform data initilization file
+ *
+ * Copyright (C) 2016, Intel Corporation
+ *
+ * Author: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/init.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/machine.h>
+
+static unsigned long pwm_config[] = {
+	PIN_CONF_PACKED(PIN_CONFIG_BIAS_DISABLE, 0),
+};
+
+static const struct pinctrl_map pwm_mapping[] = {
+	PIN_MAP_MUX_GROUP_DEFAULT("0000:00:17.0",  "INTC1002:00", "pwm0_grp", "pwm0"),
+	PIN_MAP_MUX_GROUP_DEFAULT("0000:00:17.0",  "INTC1002:00", "pwm1_grp", "pwm1"),
+	PIN_MAP_MUX_GROUP_DEFAULT("0000:00:17.0",  "INTC1002:00", "pwm2_grp", "pwm2"),
+	PIN_MAP_MUX_GROUP_DEFAULT("0000:00:17.0",  "INTC1002:00", "pwm3_grp", "pwm3"),
+	PIN_MAP_CONFIGS_PIN_DEFAULT("0000:00:17.0", "INTC1002:00", "GP12_PWM0", pwm_config),
+	PIN_MAP_CONFIGS_PIN_DEFAULT("0000:00:17.0", "INTC1002:00", "GP13_PWM1", pwm_config),
+	PIN_MAP_CONFIGS_PIN_DEFAULT("0000:00:17.0", "INTC1002:00", "GP182_PWM2", pwm_config),
+	PIN_MAP_CONFIGS_PIN_DEFAULT("0000:00:17.0", "INTC1002:00", "GP183_PWM3", pwm_config),
+};
+
+static int __init mrfld_pwm_init(void)
+{
+	return pinctrl_register_mappings(pwm_mapping, ARRAY_SIZE(pwm_mapping));
+}
+postcore_initcall(mrfld_pwm_init);
-- 
2.30.2