Re: [PATCH 02/16] dt-bindings: arm: renesas: Document Renesas RZ/G2{L,LC} SoC variants

[Lad, Prabhakar]

Hi Geert,

On Thu, May 27, 2021 at 12:28 PM Geert Uytterhoeven
<geert@xxxxxxxxxxxxxx> wrote:
>
> Hi Prabhakar,
>
> On Fri, May 21, 2021 at 7:10 PM Lad, Prabhakar
> <prabhakar.csengg@xxxxxxxxx> wrote:
> > On Fri, May 21, 2021 at 2:23 PM Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> wrote:
> > > On Fri, May 14, 2021 at 9:23 PM Lad Prabhakar
> > > <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx> wrote:
> > > > Add device tree bindings documentation for Renesas RZ/G2{L,LC}
> > > > SoC variants.
> > > >
> > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@xxxxxxxxxxxxxx>
> > > > Reviewed-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> > > > Reviewed-by: Chris Paterson <Chris.Paterson2@xxxxxxxxxxx>
> > >
> > > > --- a/Documentation/devicetree/bindings/arm/renesas.yaml
> > > > +++ b/Documentation/devicetree/bindings/arm/renesas.yaml
> > > > @@ -308,6 +308,15 @@ properties:
> > > >                - renesas,r9a07g043u11 # Single Cortex-A55 RZ/G2UL
> > > >            - const: renesas,r9a07g043
> > > >
> > > > +      - description: RZ/G2{L,LC} (R9A07G044)
> > > > +        items:
> > > > +          - enum:
> > > > +              - renesas,r9a07g044c1 # Single Cortex-A55 RZ/G2LC
> > > > +              - renesas,r9a07g044c2 # Dual Cortex-A55 RZ/G2LC
> > > > +              - renesas,r9a07g044l1 # Single Cortex-A55 RZ/G2L
> > > > +              - renesas,r9a07g044l2 # Dual Cortex-A55 RZ/G2L
> > >
> > > Given the LSI DEVID is the same for all four, and presumably they're
> > > thus the same die with different packaging, do we need these four
> > > compatible values?
> > >
> > Yes the LSI DEVID is the same for all the above, so as to
> > differentiate between each SoC's, these compatible strings are added.
>
> OK, especially for single-core versus dual-core, this can be useful,
> if "integration issues" pop up depending on the number of cores
> or other functionality being present.
>
> > * For example some IP blocks which are present on RZ/G2L aren't
> > present in RZ/G2LC.
>
> That'll be handled by the .dtsi, right?
>
Agreed.

Cheers,
Prabhakar

> > * Adding this to DTS gives an opportunity to stop booting if the wrong
> > DTB is loaded into the board.
>
> This only works for SoCs with different LSI DEVIDs.
> As all four above have the same LSI DEVID, you can only distinguish
> them by the main compatible value.  It does not protect against
> loading an RZ/G2LC DTB on an RZ/G2L board or vice versa.
>
> Gr{oetje,eeting}s,
>
>                         Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@xxxxxxxxxxxxxx
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds