[PATCH v2 0/6] clk: Ingenic JZ4760(B) support

From: Paul Cercueil
Date: Sun May 30 2021 - 12:50:13 EST


Hi,

Here is (finally) my v2 of the JZ4760(B) patchset.

Patches 1-5 are the exact same as in v1.

Patch 6's algorithm was updated with Zhou's feedback.

Cheers,
-Paul

Paul Cercueil (6):
dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles
clk: Support bypassing dividers
clk: ingenic: Read bypass register only when there is one
clk: ingenic: Remove pll_info.no_bypass_bit
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
clk: ingenic: Add support for the JZ4760

.../bindings/clock/ingenic,cgu.yaml | 4 +
drivers/clk/ingenic/Kconfig | 10 +
drivers/clk/ingenic/Makefile | 1 +
drivers/clk/ingenic/cgu.c | 92 ++--
drivers/clk/ingenic/cgu.h | 12 +-
drivers/clk/ingenic/jz4725b-cgu.c | 12 +-
drivers/clk/ingenic/jz4740-cgu.c | 12 +-
drivers/clk/ingenic/jz4760-cgu.c | 428 ++++++++++++++++++
drivers/clk/ingenic/jz4770-cgu.c | 15 +-
drivers/clk/ingenic/tcu.c | 2 +
include/dt-bindings/clock/jz4760-cgu.h | 54 +++
11 files changed, 586 insertions(+), 56 deletions(-)
create mode 100644 drivers/clk/ingenic/jz4760-cgu.c
create mode 100644 include/dt-bindings/clock/jz4760-cgu.h

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2.30.2