On Sun, May 30, 2021 at 7:51 PM Hans de Goede <hdegoede@xxxxxxxxxx> wrote:On 5/30/21 6:19 PM, Sander Vanheule wrote:
> On Fri, 2021-05-28 at 08:37 +0200, Michael Walle wrote:
...
> I think I found a solution!
> As Michael suggested, I tried raw register reads and writes, to eliminate any
> side effects of the intermediate code. I didn't use the ioctls (this isn't a
> netdev), but I found regmap's debugfs write functionality, which allowed me to
> do the same.
>
> I was trying to reproduce the behaviour I reported earlier, but couldn't. The
> output levels were always the intended ones. At some point I realised that the
> regmap_update_bits function does a read-modify-write, which might shadow the
> actual current output value.
> For example:
> * Set output low: current out is low
> * Change to input with pull-up: current out is still low, but DATAx reads high
> * Set output high: RMW reads a high value (the input), so assumes a write is
> not necessary, leaving the old output value (low).
>
> Currently, I see two options:
> * Use regmap_update_bits_base to avoid the lazy RMW behaviour
> * Add a cache for the output data values to the driver, and only use these
> values to write to the output registers. This would allow keeping lazy RMW
> behaviour, which may be a benefit on slow busses.
>
> With either of these implemented, if I set the output value before the
> direction, everything works! :-)
>
> Would you like this to be added to regmap-gpio, or should I revert back to a
> device-specific implementation?
Regmap allows you to mark certain ranges as volatile, so that they will not
be cached, these GPIO registers containing the current pin value seems like
a good candidate for this. This is also necessary to make reading the GPIO
work without getting back a stale, cached value.
After all it seems a simple missed proper register configuration in
the driver for regmap.
Oh, as usual something easy-to-solve requires tons of time to find it. :-)
Sander, I think you may look at gpio-pca953x.c to understand how it
works (volatility of registers).