[PATCH 1/9] dt-bindings: phy: Document Synopsys DesignWare HDMI RX PHYs e405 and e406
From: Nelson Costa
Date: Wed Jun 02 2021 - 07:25:04 EST
Document the device tree bindings for the Synopsys DesignWare HDMI RX
PHYs e405 and e406.
Signed-off-by: Nelson Costa <nelson.costa@xxxxxxxxxxxx>
---
.../bindings/phy/snps,phy-dw-hdmi-e40x.yaml | 93 ++++++++++++++++++++++
1 file changed, 93 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/snps,phy-dw-hdmi-e40x.yaml
diff --git a/Documentation/devicetree/bindings/phy/snps,phy-dw-hdmi-e40x.yaml b/Documentation/devicetree/bindings/phy/snps,phy-dw-hdmi-e40x.yaml
new file mode 100644
index 0000000..25bece5
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/snps,phy-dw-hdmi-e40x.yaml
@@ -0,0 +1,93 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/snps,phy-dw-hdmi-e40x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Synopsys DesignWare HDMI PHYs e405/e406 Device Tree Bindings
+
+maintainers:
+ - Jose Abreu <jose.abreu@xxxxxxxxxxxx>
+ - Nelson Costa <nelson.costa@xxxxxxxxxxxx>
+
+description: |
+ The Synopsys DesignWare HDMI PHYs e405/e406 are HDMI 2.0 PHY Receivers that
+ receive video and audio, and send to the HDMI RX Controller.
+
+properties:
+ compatible:
+ oneOf:
+ - const: snps,dw-hdmi-phy-e405
+ - const: snps,dw-hdmi-phy-e406
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+ description: |
+ phandle to the configuration clock
+
+ clock-names:
+ const: cfg
+
+ "#phy-cells":
+ const: 0
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: |
+ Output port node, multiple endpoints describing the PHY HDMI inputs data
+ connected to the HDMI RX Controller.
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#phy-cells"
+ - port
+
+additionalProperties: false
+
+examples:
+ - |
+ parent {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_e406_phy: hdmi-phy@fc {
+ compatible = "snps,dw-hdmi-phy-e406";
+ reg = <0xfc>;
+
+ clocks = <&dw_hdmi_refclk>;
+ clock-names = "cfg";
+
+ #phy-cells = <0>;
+
+ port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdmi_e406_phy_0: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&hdmi_rx_0>;
+ };
+
+ hdmi_e406_phy_1: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&hdmi_rx_1>;
+ };
+
+ hdmi_e406_phy_2: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&hdmi_rx_2>;
+ };
+
+ hdmi_e406_phy_3: endpoint@3 {
+ reg = <3>;
+ remote-endpoint = <&hdmi_rx_3>;
+ };
+ };
+ };
+ };
--
2.7.4