Re: [PATCH v9 03/22] dt-bindings: ARM: Mediatek: Add new document bindings of msdc controller

[Rob Herring]

On Mon, May 24, 2021 at 08:20:34PM +0800, Chun-Jie Chen wrote:
> This patch adds the new binding documentation of msdc controller
> for Mediatek MT8192.

This is only additional compatibles. You can combine this with the 
schema in patch 2. (Unless some blocks are syscon and some aren't)

> 
> Signed-off-by: Weiyi Lu <weiyi.lu@xxxxxxxxxxxx>
> Signed-off-by: chun-jie.chen <chun-jie.chen@xxxxxxxxxxxx>
> ---
>  .../bindings/arm/mediatek/mediatek,msdc.yaml  | 48 +++++++++++++++++++
>  1 file changed, 48 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml
> 
> diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml
> new file mode 100644
> index 000000000000..10eb43de2d2b
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,msdc.yaml
> @@ -0,0 +1,48 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,msdc.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek MSDC Controller
> +
> +maintainers:
> +  - Chun-Jie Chen <chun-jie.chen@xxxxxxxxxxxx>
> +
> +description:
> +  The Mediatek msdc controller provides functional configurations and clocks to the system.
> +
> +properties:
> +  compatible:
> +    items:
> +      - enum:
> +          - mediatek,mt8192-msdc
> +          - mediatek,mt8192-msdc_top
> +      - const: syscon
> +
> +  reg:
> +    maxItems: 1
> +
> +  '#clock-cells':
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +    msdc: syscon@11f60000 {
> +        compatible = "mediatek,mt8192-msdc", "syscon";
> +        reg = <0x11f60000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> +
> +  - |
> +    msdc_top: syscon@11f10000 {
> +        compatible = "mediatek,mt8192-msdc_top", "syscon";
> +        reg = <0x11f10000 0x1000>;
> +        #clock-cells = <1>;
> +    };
> -- 
> 2.18.0