Re: [RESEND PATCH net-next v5 3/3] net: stmmac: enable Intel mGbE 2.5Gbps link speed

From: Vladimir Oltean
Date: Fri Jun 04 2021 - 08:02:53 EST


On Fri, Jun 04, 2021 at 06:57:33PM +0800, Michael Sit Wei Hong wrote:
> From: Voon Weifeng <weifeng.voon@xxxxxxxxx>
>
> The Intel mGbE supports 2.5Gbps link speed by increasing the clock rate by
> 2.5 times of the original rate. In this mode, the serdes/PHY operates at a
> serial baud rate of 3.125 Gbps and the PCS data path and GMII interface of
> the MAC operate at 312.5 MHz instead of 125 MHz.
>
> For Intel mGbE, the overclocking of 2.5 times clock rate to support 2.5G is
> only able to be configured in the BIOS during boot time. Kernel driver has
> no access to modify the clock rate for 1Gbps/2.5G mode. The way to
> determined the current 1G/2.5G mode is by reading a dedicated adhoc
> register through mdio bus. In short, after the system boot up, it is either
> in 1G mode or 2.5G mode which not able to be changed on the fly.
>
> Compared to 1G mode, the 2.5G mode selects the 2500BASEX as PHY interface and
> disables the xpcs_an_inband. This is to cater for some PHYs that only
> supports 2500BASEX PHY interface with no autonegotiation.
>
> v2: remove MAC supported link speed masking
> v3: Restructure to introduce intel_speed_mode_2500() to read serdes registers
> for max speed supported and select the appropritate configuration.
> Use max_speed to determine the supported link speed mask.
>
> Signed-off-by: Voon Weifeng <weifeng.voon@xxxxxxxxx>
> Signed-off-by: Michael Sit Wei Hong <michael.wei.hong.sit@xxxxxxxxx>
> ---

Reviewed-by: Vladimir Oltean <vladimir.oltean@xxxxxxx>