Re: [RFC PATCH net-next] net: dsa: tag_qca: Check for upstream VLAN tag
From: Matthew Hagan
Date: Sat Jun 05 2021 - 18:40:48 EST
On 05/06/2021 21:35, Andrew Lunn wrote:
>> The tested case is a Meraki MX65 which features two QCA8337 switches with
>> their CPU ports attached to a BCM58625 switch ports 4 and 5 respectively.
> Hi Matthew
>
> The BCM58625 switch is also running DSA? What does you device tree
> look like? I know Florian has used two broadcom switches in cascade
> and did not have problems.
>
> Andrew
Hi Andrew
I did discuss this with Florian, who recommended I submit the changes. Can
confirm the b53 DSA driver is being used. The issue here is that tagging
must occur on all ports. We can't selectively disable for ports 4 and 5
where the QCA switches are attached, thus this patch is required to get
things working.
Setup is like this:
sw0p2 sw0p4 sw1p2 sw1p4
wan1 wan2 sw0p1 + sw0p3 + sw0p5 sw1p1 + sw1p3 + sw1p5
+ + + | + | + + | + | +
| | | | | | | | | | | |
| | +--+----+----+----+----+-+ +--+----+----+----+----+-+
| | | QCA8337 | | QCA8337 |
| | +------------+-----------+ +-----------+------------+
| | sw0 | sw1 |
+----+-------+-----------------+-------------------------+------------+
| 0 1 BCM58625 4 5 |
+----+-------+-----------------+-------------------------+------------+
Relevant sections of the device tree are as follows:
mdio@0 {
reg = <0x0>;
#address-cells = <1>;
#size-cells = <0>;
phy_port6: phy@0 {
reg = <0>;
};
phy_port7: phy@1 {
reg = <1>;
};
phy_port8: phy@2 {
reg = <2>;
};
phy_port9: phy@3 {
reg = <3>;
};
phy_port10: phy@4 {
reg = <4>;
};
switch@10 {
compatible = "qca,qca8337";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10>;
dsa,member = <1 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
ethernet = <&sgmii1>;
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@1 {
reg = <1>;
label = "sw1p1";
phy-handle = <&phy_port6>;
};
port@2 {
reg = <2>;
label = "sw1p2";
phy-handle = <&phy_port7>;
};
port@3 {
reg = <3>;
label = "sw1p3";
phy-handle = <&phy_port8>;
};
port@4 {
reg = <4>;
label = "sw1p4";
phy-handle = <&phy_port9>;
};
port@5 {
reg = <5>;
label = "sw1p5";
phy-handle = <&phy_port10>;
};
};
};
};
mdio-mii@2000 {
reg = <0x2000>;
#address-cells = <1>;
#size-cells = <0>;
phy_port1: phy@0 {
reg = <0>;
};
phy_port2: phy@1 {
reg = <1>;
};
phy_port3: phy@2 {
reg = <2>;
};
phy_port4: phy@3 {
reg = <3>;
};
phy_port5: phy@4 {
reg = <4>;
};
switch@10 {
compatible = "qca,qca8337";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10>;
dsa,member = <2 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "cpu";
ethernet = <&sgmii0>;
phy-mode = "sgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@1 {
reg = <1>;
label = "sw0p1";
phy-handle = <&phy_port1>;
};
port@2 {
reg = <2>;
label = "sw0p2";
phy-handle = <&phy_port2>;
};
port@3 {
reg = <3>;
label = "sw0p3";
phy-handle = <&phy_port3>;
};
port@4 {
reg = <4>;
label = "sw0p4";
phy-handle = <&phy_port4>;
};
port@5 {
reg = <5>;
label = "sw0p5";
phy-handle = <&phy_port5>;
};
};
};
};
&srab {
compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
status = "okay";
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
label = "wan1";
reg = <0>;
};
port@1 {
label = "wan2";
reg = <1>;
};
sgmii0: port@4 {
label = "sw0";
reg = <4>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
sgmii1: port@5 {
label = "sw1";
reg = <5>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@8 {
ethernet = <&amac2>;
label = "cpu";
reg = <8>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
Matthew