RE: [PATCH V6 0/4] soc: imx: add i.MX BLK-CTL support

[Peng Fan]

Shawn:

> Subject: [PATCH V6 0/4] soc: imx: add i.MX BLK-CTL support

Gentle ping..

Thanks,
Peng.

> 
> From: Peng Fan <peng.fan@xxxxxxx>
> 
> V6:
>  Thanks for Adam's report on V5.
>  Resolve the error message dump, it is the child device reuse  the parent
> device node and matches the parent driver.
>  Filled the remove function for child device.
>  A diff dts file for upstream:
>  https://gist.github.com/MrVan/d73888d8273c43ea4a3b28fa668ca1d0
> 
> V5:
>  Rework the blk-ctl driver to let sub-PGC use blk-ctl as parent power
> domain to fix the potential handshake issue.
>  I still keep R-b/A-b tag for Patch 1,2,4, since very minor changes  I only drop
> R-b tag for Patch 3, since it has big change.
>  An example, the pgc_mipi not take pgc_dispmix as parent:
> 
> 	pgc_dispmix: power-domain@10 {
> 		#power-domain-cells = <0>;
> 		reg = <IMX8MM_POWER_DOMAIN_DISPMIX>;
> 		clocks = <&clk IMX8MM_CLK_DISP_ROOT>,
> 			 <&clk IMX8MM_CLK_DISP_AXI_ROOT>,
> 			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
> 	};
> 
> 	pgc_mipi: power-domain@11 {
> 		#power-domain-cells = <0>;
> 		reg = <IMX8MM_POWER_DOMAIN_MIPI>;
> 		power-domains = <&dispmix_blk_ctl
> IMX8MM_BLK_CTL_PD_DISPMIX_BUS>;
> 	};
> 
> 	dispmix_blk_ctl: clock-controller@32e28000 {
> 		compatible = "fsl,imx8mm-dispmix-blk-ctl", "syscon";
> 		reg = <0x32e28000 0x100>;
> 		#power-domain-cells = <1>;
> 		power-domains = <&pgc_dispmix>, <&pgc_mipi>;
> 		power-domain-names = "dispmix", "mipi";
> 		clocks = <&clk IMX8MM_CLK_DISP_ROOT>, <&clk
> IMX8MM_CLK_DISP_AXI_ROOT>,
> 			 <&clk IMX8MM_CLK_DISP_APB_ROOT>;
> 	};
> 
> V4:
>  Add R-b tag
>  Typo fix
>  Update the power domain macro names Per Abel and Frieder
> 
> V3:
>  Add explaination for not listing items in patch 2 commit log Per Rob.
>  Addressed comments from Lucas and Frieder on patch [3,4].
>  A few comments from Jacky was ignored, because following gpcv2  coding
> style.
> 
> V2:
>  Fix yaml check failure.
> 
> Previously there is an effort from Abel that take BLK-CTL as clock provider, but
> it turns out that there is A/B lock issue and we are not able resolve that.
> 
> Per discuss with Lucas and Jacky, we made an agreement that take BLK-CTL
> as a power domain provider and use GPC's domain as parent, the consumer
> node take BLK-CTL as power domain input.
> 
> This patchset has been tested on i.MX8MM EVK board, but one hack is not
> included in the patchset is that the DISPMIX BLK-CTL MIPI_M/S_RESET not
> implemented. Per Lucas, we will finally have a MIPI DPHY driver, so fine to
> leave it.
> 
> Thanks for Lucas's suggestion, Frieder Schrempf for collecting all the patches,
> Abel's previous BLK-CTL work, Jacky Bai on help debug issues.
> 
> 
> Peng Fan (4):
>   dt-bindings: power: Add defines for i.MX8MM BLK-CTL power domains
>   Documentation: bindings: clk: Add bindings for i.MX BLK_CTL
>   soc: imx: Add generic blk-ctl driver
>   soc: imx: Add blk-ctl driver for i.MX8MM
> 
>  .../bindings/soc/imx/fsl,imx-blk-ctl.yaml     |  66 ++++
>  drivers/soc/imx/Makefile                      |   2 +-
>  drivers/soc/imx/blk-ctl-imx8mm.c              | 139 ++++++++
>  drivers/soc/imx/blk-ctl.c                     | 334
> ++++++++++++++++++
>  drivers/soc/imx/blk-ctl.h                     |  85 +++++
>  include/dt-bindings/power/imx8mm-power.h      |  13 +
>  6 files changed, 638 insertions(+), 1 deletion(-)  create mode 100644
> Documentation/devicetree/bindings/soc/imx/fsl,imx-blk-ctl.yaml
>  create mode 100644 drivers/soc/imx/blk-ctl-imx8mm.c  create mode
> 100644 drivers/soc/imx/blk-ctl.c  create mode 100644
> drivers/soc/imx/blk-ctl.h
> 
> --
> 2.30.0