[PATCH v5 3/4] fpga: altera: reorganize to subdir layout

From: trix
Date: Tue Jun 22 2021 - 16:06:12 EST

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From: Tom Rix <trix@xxxxxxxxxx>

Follow drivers/net/ethernet/ which has control configs
NET_VENDOR_BLA that map to drivers/net/ethernet/bla
Since fpgas do not have many vendors, drop the 'VENDOR' and use
FPGA_BLA.

There are several new subdirs
altera/
dfl/
lattice/
xilinx/

Each subdir has a Kconfig that has a new/reused

if FPGA_BLA
... existing configs ...
endif FPGA_BLA

Which is sourced into the main fpga/Kconfig

Each subdir has a Makefile whose transversal is controlled in the
fpga/Makefile by

obj-$(CONFIG_FPGA_BLA) += bla/

This is the altera/ subdir part.

Create a altera/ subdir
Move altera-* and soc* ts73xx* files to it.
Add a Kconfig and Makefile

Signed-off-by: Tom Rix <trix@xxxxxxxxxx>
---
drivers/fpga/Kconfig | 70 +--------------
drivers/fpga/Makefile | 11 +--
drivers/fpga/altera/Kconfig | 85 +++++++++++++++++++
drivers/fpga/altera/Makefile | 12 +++
drivers/fpga/{ => altera}/altera-cvp.c | 0
drivers/fpga/{ => altera}/altera-fpga2sdram.c | 0
.../fpga/{ => altera}/altera-freeze-bridge.c | 0
drivers/fpga/{ => altera}/altera-hps2fpga.c | 0
.../{ => altera}/altera-pr-ip-core-plat.c | 0
drivers/fpga/{ => altera}/altera-pr-ip-core.c | 0
drivers/fpga/{ => altera}/altera-ps-spi.c | 0
drivers/fpga/{ => altera}/socfpga-a10.c | 0
drivers/fpga/{ => altera}/socfpga.c | 0
drivers/fpga/{ => altera}/stratix10-soc.c | 0
drivers/fpga/{ => altera}/ts73xx-fpga.c | 0
15 files changed, 99 insertions(+), 79 deletions(-)
create mode 100644 drivers/fpga/altera/Kconfig
create mode 100644 drivers/fpga/altera/Makefile
rename drivers/fpga/{ => altera}/altera-cvp.c (100%)
rename drivers/fpga/{ => altera}/altera-fpga2sdram.c (100%)
rename drivers/fpga/{ => altera}/altera-freeze-bridge.c (100%)
rename drivers/fpga/{ => altera}/altera-hps2fpga.c (100%)
rename drivers/fpga/{ => altera}/altera-pr-ip-core-plat.c (100%)
rename drivers/fpga/{ => altera}/altera-pr-ip-core.c (100%)
rename drivers/fpga/{ => altera}/altera-ps-spi.c (100%)
rename drivers/fpga/{ => altera}/socfpga-a10.c (100%)
rename drivers/fpga/{ => altera}/socfpga.c (100%)
rename drivers/fpga/{ => altera}/stratix10-soc.c (100%)
rename drivers/fpga/{ => altera}/ts73xx-fpga.c (100%)

diff --git a/drivers/fpga/Kconfig b/drivers/fpga/Kconfig
index 28c261807b428..2c829b1105925 100644
--- a/drivers/fpga/Kconfig
+++ b/drivers/fpga/Kconfig
@@ -12,52 +12,6 @@ menuconfig FPGA

if FPGA

-config FPGA_MGR_SOCFPGA
- tristate "Altera SOCFPGA FPGA Manager"
- depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST
- help
- FPGA manager driver support for Altera SOCFPGA.
-
-config FPGA_MGR_SOCFPGA_A10
- tristate "Altera SoCFPGA Arria10"
- depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST
- select REGMAP_MMIO
- help
- FPGA manager driver support for Altera Arria10 SoCFPGA.
-
-config ALTERA_PR_IP_CORE
- tristate "Altera Partial Reconfiguration IP Core"
- help
- Core driver support for Altera Partial Reconfiguration IP component
-
-config ALTERA_PR_IP_CORE_PLAT
- tristate "Platform support of Altera Partial Reconfiguration IP Core"
- depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
- help
- Platform driver support for Altera Partial Reconfiguration IP
- component
-
-config FPGA_MGR_ALTERA_PS_SPI
- tristate "Altera FPGA Passive Serial over SPI"
- depends on SPI
- select BITREVERSE
- help
- FPGA manager driver support for Altera Arria/Cyclone/Stratix
- using the passive serial interface over SPI.
-
-config FPGA_MGR_ALTERA_CVP
- tristate "Altera CvP FPGA Manager"
- depends on PCI
- help
- FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
- Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe.
-
-config FPGA_MGR_STRATIX10_SOC
- tristate "Intel Stratix10 SoC FPGA Manager"
- depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE)
- help
- FPGA manager driver support for the Intel Stratix10 SoC.
-
config FPGA_MGR_ICE40_SPI
tristate "Lattice iCE40 SPI"
depends on OF && SPI
@@ -71,35 +25,12 @@ config FPGA_MGR_MACHXO2_SPI
FPGA manager driver support for Lattice MachXO2 configuration
over slave SPI interface.

-config FPGA_MGR_TS73XX
- tristate "Technologic Systems TS-73xx SBC FPGA Manager"
- depends on ARCH_EP93XX && MACH_TS72XX
- help
- FPGA manager driver support for the Altera Cyclone II FPGA
- present on the TS-73xx SBC boards.
-
config FPGA_BRIDGE
tristate "FPGA Bridge Framework"
help
Say Y here if you want to support bridges connected between host
processors and FPGAs or between FPGAs.

-config SOCFPGA_FPGA_BRIDGE
- tristate "Altera SoCFPGA FPGA Bridges"
- depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE
- help
- Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
- devices.
-
-config ALTERA_FREEZE_BRIDGE
- tristate "Altera FPGA Freeze Bridge"
- depends on FPGA_BRIDGE && HAS_IOMEM
- help
- Say Y to enable drivers for Altera FPGA Freeze bridges. A
- freeze bridge is a bridge that exists in the FPGA fabric to
- isolate one region of the FPGA from the busses while that
- region is being reprogrammed.
-
config FPGA_REGION
tristate "FPGA Region"
depends on FPGA_BRIDGE
@@ -115,6 +46,7 @@ config OF_FPGA_REGION
Support for loading FPGA images by applying a Device Tree
overlay.

+source "drivers/fpga/altera/Kconfig"
source "drivers/fpga/dfl/Kconfig"
source "drivers/fpga/xilinx/Kconfig"

diff --git a/drivers/fpga/Makefile b/drivers/fpga/Makefile
index 0868c7c4264d8..db83aeb997f24 100644
--- a/drivers/fpga/Makefile
+++ b/drivers/fpga/Makefile
@@ -7,25 +7,16 @@
obj-$(CONFIG_FPGA) += fpga-mgr.o

# FPGA Manager Drivers
-obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
-obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
-obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
-obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
-obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o
-obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
-obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
-obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o

# FPGA Bridge Drivers
obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
-obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
-obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o

# High Level Interfaces
obj-$(CONFIG_FPGA_REGION) += fpga-region.o
obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o

+obj-$(CONFIG_FPGA_ALTERA) += altera/
obj-$(CONFIG_FPGA_DFL) += dfl/
obj-$(CONFIG_FPGA_XILINX) += xilinx/
diff --git a/drivers/fpga/altera/Kconfig b/drivers/fpga/altera/Kconfig
new file mode 100644
index 0000000000000..7075c6dc48e44
--- /dev/null
+++ b/drivers/fpga/altera/Kconfig
@@ -0,0 +1,85 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+config FPGA_ALTERA
+ bool "Altera FPGAs"
+ default y
+ help
+ If you have an Altera FPGA, say Y.
+
+ Note that the answer to this question doesn't directly affect the
+ kernel: saying N will just cause the configurator to skip all
+ the questions about Altera FPGAs. If you say Y, you will be asked
+ for your specific device in the following questions.
+
+if FPGA_ALTERA
+
+config FPGA_MGR_SOCFPGA
+ tristate "Altera SOCFPGA FPGA Manager"
+ depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST
+ help
+ FPGA manager driver support for Altera SOCFPGA.
+
+config FPGA_MGR_SOCFPGA_A10
+ tristate "Altera SoCFPGA Arria10"
+ depends on ARCH_INTEL_SOCFPGA || COMPILE_TEST
+ select REGMAP_MMIO
+ help
+ FPGA manager driver support for Altera Arria10 SoCFPGA.
+
+config ALTERA_PR_IP_CORE
+ tristate "Altera Partial Reconfiguration IP Core"
+ help
+ Core driver support for Altera Partial Reconfiguration IP component
+
+config ALTERA_PR_IP_CORE_PLAT
+ tristate "Platform support of Altera Partial Reconfiguration IP Core"
+ depends on ALTERA_PR_IP_CORE && OF && HAS_IOMEM
+ help
+ Platform driver support for Altera Partial Reconfiguration IP
+ component
+
+config FPGA_MGR_ALTERA_PS_SPI
+ tristate "Altera FPGA Passive Serial over SPI"
+ depends on SPI
+ select BITREVERSE
+ help
+ FPGA manager driver support for Altera Arria/Cyclone/Stratix
+ using the passive serial interface over SPI.
+
+config FPGA_MGR_ALTERA_CVP
+ tristate "Altera CvP FPGA Manager"
+ depends on PCI
+ help
+ FPGA manager driver support for Arria-V, Cyclone-V, Stratix-V,
+ Arria 10 and Stratix10 Altera FPGAs using the CvP interface over PCIe.
+
+config FPGA_MGR_STRATIX10_SOC
+ tristate "Intel Stratix10 SoC FPGA Manager"
+ depends on (ARCH_INTEL_SOCFPGA && INTEL_STRATIX10_SERVICE)
+ help
+ FPGA manager driver support for the Intel Stratix10 SoC.
+
+config FPGA_MGR_TS73XX
+ tristate "Technologic Systems TS-73xx SBC FPGA Manager"
+ depends on ARCH_EP93XX && MACH_TS72XX
+ help
+ FPGA manager driver support for the Altera Cyclone II FPGA
+ present on the TS-73xx SBC boards.
+
+config ALTERA_FREEZE_BRIDGE
+ tristate "Altera FPGA Freeze Bridge"
+ depends on FPGA_BRIDGE && HAS_IOMEM
+ help
+ Say Y to enable drivers for Altera FPGA Freeze bridges. A
+ freeze bridge is a bridge that exists in the FPGA fabric to
+ isolate one region of the FPGA from the busses while that
+ region is being reprogrammed.
+
+config SOCFPGA_FPGA_BRIDGE
+ tristate "Altera SoCFPGA FPGA Bridges"
+ depends on ARCH_INTEL_SOCFPGA && FPGA_BRIDGE
+ help
+ Say Y to enable drivers for FPGA bridges for Altera SOCFPGA
+ devices.
+
+endif #FPGA_ALTERA
diff --git a/drivers/fpga/altera/Makefile b/drivers/fpga/altera/Makefile
new file mode 100644
index 0000000000000..9c86057cff110
--- /dev/null
+++ b/drivers/fpga/altera/Makefile
@@ -0,0 +1,12 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
+obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
+obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
+obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
+obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
+obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
+obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
+obj-$(CONFIG_FPGA_MGR_STRATIX10_SOC) += stratix10-soc.o
+obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
+obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
diff --git a/drivers/fpga/altera-cvp.c b/drivers/fpga/altera/altera-cvp.c
similarity index 100%
rename from drivers/fpga/altera-cvp.c
rename to drivers/fpga/altera/altera-cvp.c
diff --git a/drivers/fpga/altera-fpga2sdram.c b/drivers/fpga/altera/altera-fpga2sdram.c
similarity index 100%
rename from drivers/fpga/altera-fpga2sdram.c
rename to drivers/fpga/altera/altera-fpga2sdram.c
diff --git a/drivers/fpga/altera-freeze-bridge.c b/drivers/fpga/altera/altera-freeze-bridge.c
similarity index 100%
rename from drivers/fpga/altera-freeze-bridge.c
rename to drivers/fpga/altera/altera-freeze-bridge.c
diff --git a/drivers/fpga/altera-hps2fpga.c b/drivers/fpga/altera/altera-hps2fpga.c
similarity index 100%
rename from drivers/fpga/altera-hps2fpga.c
rename to drivers/fpga/altera/altera-hps2fpga.c
diff --git a/drivers/fpga/altera-pr-ip-core-plat.c b/drivers/fpga/altera/altera-pr-ip-core-plat.c
similarity index 100%
rename from drivers/fpga/altera-pr-ip-core-plat.c
rename to drivers/fpga/altera/altera-pr-ip-core-plat.c
diff --git a/drivers/fpga/altera-pr-ip-core.c b/drivers/fpga/altera/altera-pr-ip-core.c
similarity index 100%
rename from drivers/fpga/altera-pr-ip-core.c
rename to drivers/fpga/altera/altera-pr-ip-core.c
diff --git a/drivers/fpga/altera-ps-spi.c b/drivers/fpga/altera/altera-ps-spi.c
similarity index 100%
rename from drivers/fpga/altera-ps-spi.c
rename to drivers/fpga/altera/altera-ps-spi.c
diff --git a/drivers/fpga/socfpga-a10.c b/drivers/fpga/altera/socfpga-a10.c
similarity index 100%
rename from drivers/fpga/socfpga-a10.c
rename to drivers/fpga/altera/socfpga-a10.c
diff --git a/drivers/fpga/socfpga.c b/drivers/fpga/altera/socfpga.c
similarity index 100%
rename from drivers/fpga/socfpga.c
rename to drivers/fpga/altera/socfpga.c
diff --git a/drivers/fpga/stratix10-soc.c b/drivers/fpga/altera/stratix10-soc.c
similarity index 100%
rename from drivers/fpga/stratix10-soc.c
rename to drivers/fpga/altera/stratix10-soc.c
diff --git a/drivers/fpga/ts73xx-fpga.c b/drivers/fpga/altera/ts73xx-fpga.c
similarity index 100%
rename from drivers/fpga/ts73xx-fpga.c
rename to drivers/fpga/altera/ts73xx-fpga.c
--
2.26.3

Next message: Sean Christopherson: "[PATCH 07/19] KVM: selftests: Lower the min virtual address for misc page allocations"
Previous message: trix: "[PATCH v5 2/4] fpga: xilinx: reorganize to subdir layout"
In reply to: trix: "[PATCH v5 2/4] fpga: xilinx: reorganize to subdir layout"
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