Re: [PATCH v3 02/12] dt-bindings: phy: tegra20-usb-phy: Document properties needed for OTG mode

[Rob Herring]

On Mon, Jul 05, 2021 at 01:54:23AM +0300, Dmitry Osipenko wrote:
> In order to support OTG mode we need these new properties:
> 
> 	- interrupt
> 	- nvidia,pmc
> 	- nvidia,phy-instance
> 
> The nvidia,phy-instance isn't strictly needed for the OTG mode since we
> know that only first controller supports it in practice, but it will be
> needed in general for supporting more complex hardware features that
> require knowledge of the PHY offset within common registers of the Power
> Management controller (PMC).
> 
> Add the new properties to the bindings.
> 
> Signed-off-by: Dmitry Osipenko <digetx@xxxxxxxxx>
> ---
>  .../bindings/phy/nvidia,tegra20-usb-phy.yaml  | 20 +++++++++++++++++++
>  1 file changed, 20 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml
> index 593187234e6a..a108f1552042 100644
> --- a/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/nvidia,tegra20-usb-phy.yaml
> @@ -77,6 +77,9 @@ properties:
>            - const: timer
>            - const: utmi-pads
>  
> +  interrupts:
> +    maxItems: 1
> +
>    resets:
>      oneOf:
>        - maxItems: 1
> @@ -199,6 +202,17 @@ properties:
>      maxItems: 1
>      description: GPIO used to reset the PHY.
>  
> +  nvidia,pmc:
> +    $ref: /schemas/types.yaml#/definitions/phandle
> +    description:
> +      Phandle to Power Management controller.
> +

Add a cell to this for the PHY reg offset and then get rid of the index:

> +  nvidia,phy-instance:
> +    $ref: /schemas/types.yaml#/definitions/uint32
> +    minimum: 0
> +    maximum: 2
> +    description: Unique hardware ID.
> +
>  required:
>    - compatible
>    - reg
> @@ -320,6 +334,7 @@ examples:
>          compatible = "nvidia,tegra124-usb-phy", "nvidia,tegra30-usb-phy";
>          reg = <0x7d008000 0x4000>,
>                <0x7d000000 0x4000>;
> +        interrupts = <0 97 4>;
>          phy_type = "utmi";
>          clocks = <&tegra_car TEGRA124_CLK_USB3>,
>                   <&tegra_car TEGRA124_CLK_PLL_U>,
> @@ -338,6 +353,8 @@ examples:
>          nvidia,hssquelch-level = <2>;
>          nvidia,hsdiscon-level = <5>;
>          nvidia,xcvr-hsslew = <12>;
> +        nvidia,pmc = <&tegra_pmc>;
> +        nvidia,phy-instance= <2>;
>      };
>  
>    - |
> @@ -346,6 +363,7 @@ examples:
>      usb-phy@c5004000 {
>          compatible = "nvidia,tegra20-usb-phy";
>          reg = <0xc5004000 0x4000>;
> +        interrupts = <0 21 4>;
>          phy_type = "ulpi";
>          clocks = <&tegra_car TEGRA20_CLK_USB2>,
>                   <&tegra_car TEGRA20_CLK_PLL_U>,
> @@ -354,4 +372,6 @@ examples:
>          resets = <&tegra_car 58>, <&tegra_car 22>;
>          reset-names = "usb", "utmi-pads";
>          #phy-cells = <0>;
> +        nvidia,pmc = <&tegra_pmc>;
> +        nvidia,phy-instance= <1>;
>      };
> -- 
> 2.32.0
> 
>