Re: [v9 2/2] pwm: Add Aspeed ast2600 PWM support

[Billy Tsai]

Hello Uwe,

On 2021/7/16, 3:10 PM, "Uwe Kleine-König" <u.kleine-koenig@xxxxxxxxxxxxxx> wrote:

    Hello Billy,

    On Fri, Jul 16, 2021 at 01:48:20AM +0000, Billy Tsai wrote:
    >> On 2021/7/15, 11:06 PM, "Uwe Kleine-König" <u.kleine-koenig@xxxxxxxxxxxxxx>> wrote:
    >>     > Another is: The PWM doesn't support duty_cycle 0, on such a request the
    >>     > PWM is disabled which results in a constant inactive level.
    >> 
    >>     > (This is correct, is it? Or does it yield a constant 0 level?)
    >> 
    >> Our pwm can support duty_cycle 0 by unset CLK_ENABLE.

    > This has a slightly different semantic though. Some consumer might
    > expect that the following sequence:

    >	pwm_apply(mypwm, { .period = 10000, .duty_cycle = 10000, .enabled = true })
    >	pwm_apply(mypwm, { .period = 10000, .duty_cycle = 0, .enabled = true })
    >	pwm_apply(mypwm, { .period = 10000, .duty_cycle = 10000, .enabled = true })

    > results in the output being low for an integer multiple of 10 µs. This
    > isn't given with setting CLK_ENABLE to zero, is it? (I didn't recheck,
    > if the PWM doesn't complete periods on reconfiguration this doesn't
    > matter much though.)
Thanks for the explanation.
Our hardware actually can only support duty from 1/256 to 256/256.
For this situation I can do possible solution:
We can though change polarity to meet this requirement. Inverse the pin and use
duty_cycle 100. 
But I think this is not a good solution for this problem right?