Re: [PATCH v3 4/5] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN frequency limit

[kernel test robot]

Hi "Michał,

I love your patch! Yet something to improve:

[auto build test ERROR on linus/master]
[also build test ERROR on v5.14-rc2 next-20210723]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
base:   https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git d8079fac168168b25677dc16c00ffaf9fb7df723
config: riscv-randconfig-c003-20210725 (attached as .config)
compiler: riscv32-linux-gcc (GCC) 10.3.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/bf08b4b0109a3163b61d8731f021a3421d6ffd08
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Micha-Miros-aw/mmc-sdhci-fix-base-clock-usage-in-preset-value/20210725-132527
        git checkout bf08b4b0109a3163b61d8731f021a3421d6ffd08
        # save the attached .config to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-10.3.0 make.cross O=build_dir ARCH=riscv SHELL=/bin/bash drivers/mmc/host/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

>> drivers/mmc/host/sdhci-of-dwcmshc.c:286:45: error: expected '}' before ';' token
     286 |  .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
         |                                             ^
   drivers/mmc/host/sdhci-of-dwcmshc.c:282:67: note: to match this '{'
     282 | static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
         |                                                                   ^
   drivers/mmc/host/sdhci-of-dwcmshc.c: In function 'dwcmshc_rk3568_init':
>> drivers/mmc/host/sdhci-of-dwcmshc.c:321:36: error: passing argument 1 of 'sdhci_pltfm_clk_get_max_clock' from incompatible pointer type [-Werror=incompatible-pointer-types]
     321 |  if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
         |                                    ^~~~~~~~~~
         |                                    |
         |                                    struct sdhci_pltfm_host *
   In file included from drivers/mmc/host/sdhci-of-dwcmshc.c:20:
   drivers/mmc/host/sdhci-pltfm.h:107:70: note: expected 'struct sdhci_host *' but argument is of type 'struct sdhci_pltfm_host *'
     107 | extern unsigned int sdhci_pltfm_clk_get_max_clock(struct sdhci_host *host);
         |                                                   ~~~~~~~~~~~~~~~~~~~^~~~
   cc1: some warnings being treated as errors


vim +286 drivers/mmc/host/sdhci-of-dwcmshc.c

   281	
   282	static const struct sdhci_pltfm_data sdhci_dwcmshc_rk3568_pdata = {
   283		.ops = &sdhci_dwcmshc_rk3568_ops,
   284		.quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
   285			  SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 > 286		.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
   287	};
   288	
   289	static int dwcmshc_rk3568_init(struct sdhci_host *host, struct dwcmshc_priv *dwc_priv)
   290	{
   291		struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
   292		struct rk3568_priv *priv = dwc_priv->priv;
   293		int err;
   294	
   295		priv->rockchip_clks[0].id = "axi";
   296		priv->rockchip_clks[1].id = "block";
   297		priv->rockchip_clks[2].id = "timer";
   298		err = devm_clk_bulk_get_optional(mmc_dev(host->mmc), RK3568_MAX_CLKS,
   299						 priv->rockchip_clks);
   300		if (err) {
   301			dev_err(mmc_dev(host->mmc), "failed to get clocks %d\n", err);
   302			return err;
   303		}
   304	
   305		err = clk_bulk_prepare_enable(RK3568_MAX_CLKS, priv->rockchip_clks);
   306		if (err) {
   307			dev_err(mmc_dev(host->mmc), "failed to enable clocks %d\n", err);
   308			return err;
   309		}
   310	
   311		if (of_property_read_u8(mmc_dev(host->mmc)->of_node, "rockchip,txclk-tapnum",
   312					&priv->txclk_tapnum))
   313			priv->txclk_tapnum = DLL_TXCLK_TAPNUM_DEFAULT;
   314	
   315		/* Disable cmd conflict check */
   316		sdhci_writel(host, 0x0, dwc_priv->vendor_specific_area1 + DWCMSHC_HOST_CTRL3);
   317		/* Reset previous settings */
   318		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK);
   319		sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN);
   320	
 > 321		if (sdhci_pltfm_clk_get_max_clock(pltfm_host) <= 25000000)
   322			host->quirks2 |= SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN;
   323	
   324		return 0;
   325	}
   326	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx

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