Re: [PATCH v11 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node

From: Chuanjia Liu (柳传嘉)
Date: Fri Aug 06 2021 - 03:37:52 EST

Next message: Dan Carpenter: "drivers/net/ethernet/mellanox/mlx5/core/en_main.c:339 mlx5e_get_mpwqe_offset() warn: should '(wqe_ix * ((((((((((1))) << (((18 - 12 > 0) ?18 - 12:0))) + 1)) + (((8)) - 1)) & ~(((8)) - 1))))) << 12' be a 64 bit type?"
Previous message: kernel test robot: "[mkp-scsi:for-next 80/148] block/bsg.c:378:21: sparse: sparse: incorrect type in initializer (different address spaces)"
In reply to: Rob Herring: "Re: [PATCH v11 2/4] PCI: mediatek: Add new method to get shared pcie-cfg base address and parse node"
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

On Tue, 2021-08-03 at 16:18 -0600, Rob Herring wrote:
> On Mon, Jul 19, 2021 at 8:59 PM Chuanjia Liu <
> chuanjia.liu@xxxxxxxxxxxx> wrote:
> >
> > On Mon, 2021-07-19 at 15:34 +0800, Chuanjia Liu wrote:
> > > For the new dts format, add a new method to get
> > > shared pcie-cfg base address and parse node.
> > >
> > > Signed-off-by: Chuanjia Liu <chuanjia.liu@xxxxxxxxxxxx>
> > > Acked-by: Ryder Lee <ryder.lee@xxxxxxxxxxxx>
> > > ---
> > > drivers/pci/controller/pcie-mediatek.c | 52 +++++++++++++++++++-
> > > ------
> > > 1 file changed, 39 insertions(+), 13 deletions(-)
> > >
> > > diff --git a/drivers/pci/controller/pcie-mediatek.c
> > > b/drivers/pci/controller/pcie-mediatek.c
> > > index 25bee693834f..928e0983a900 100644
> > > --- a/drivers/pci/controller/pcie-mediatek.c
> > > +++ b/drivers/pci/controller/pcie-mediatek.c
> > > @@ -14,6 +14,7 @@
> > > #include <linux/irqchip/chained_irq.h>
> > > #include <linux/irqdomain.h>
> > > #include <linux/kernel.h>
> > > +#include <linux/mfd/syscon.h>
> > > #include <linux/msi.h>
> > > #include <linux/module.h>
> > > #include <linux/of_address.h>
> > > @@ -23,6 +24,7 @@
> > > #include <linux/phy/phy.h>
> > > #include <linux/platform_device.h>
> > > #include <linux/pm_runtime.h>
> > > +#include <linux/regmap.h>
> > > #include <linux/reset.h>
> > >
> > > #include "../pci.h"
> > > @@ -207,6 +209,7 @@ struct mtk_pcie_port {
> > > * struct mtk_pcie - PCIe host information
> > > * @dev: pointer to PCIe device
> > > * @base: IO mapped register base
> > > + * @cfg: IO mapped register map for PCIe config
> > > * @free_ck: free-run reference clock
> > > * @mem: non-prefetchable memory resource
> > > * @ports: pointer to PCIe port information
> > > @@ -215,6 +218,7 @@ struct mtk_pcie_port {
> > > struct mtk_pcie {
> > > struct device *dev;
> > > void __iomem *base;
> > > + struct regmap *cfg;
> > > struct clk *free_ck;
> > >
> > > struct list_head ports;
> > > @@ -650,7 +654,11 @@ static int mtk_pcie_setup_irq(struct
> > > mtk_pcie_port *port,
> > > return err;
> > > }
> > >
> > > - port->irq = platform_get_irq(pdev, port->slot);
> > > + if (of_find_property(dev->of_node, "interrupt-names",
> > > NULL))
> > > + port->irq = platform_get_irq_byname(pdev,
> > > "pcie_irq");
> > > + else
> > > + port->irq = platform_get_irq(pdev, port->slot);
> > > +
> > > if (port->irq < 0)
> > > return port->irq;
> > >
> > > @@ -682,6 +690,10 @@ static int mtk_pcie_startup_port_v2(struct
> > > mtk_pcie_port *port)
> > > val |= PCIE_CSR_LTSSM_EN(port->slot) |
> > > PCIE_CSR_ASPM_L1_EN(port->slot);
> > > writel(val, pcie->base + PCIE_SYS_CFG_V2);
> > > + } else if (pcie->cfg) {
> > > + val = PCIE_CSR_LTSSM_EN(port->slot) |
> > > + PCIE_CSR_ASPM_L1_EN(port->slot);
> > > + regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val,
> > > val);
> > > }
> > >
> > > /* Assert all reset signals */
> > > @@ -985,6 +997,7 @@ static int mtk_pcie_subsys_powerup(struct
> > > mtk_pcie *pcie)
> > > struct device *dev = pcie->dev;
> > > struct platform_device *pdev = to_platform_device(dev);
> > > struct resource *regs;
> > > + struct device_node *cfg_node;
> > > int err;
> > >
> > > /* get shared registers, which are optional */
> > > @@ -995,6 +1008,14 @@ static int mtk_pcie_subsys_powerup(struct
> > > mtk_pcie *pcie)
> > > return PTR_ERR(pcie->base);
> > > }
> > >
> > > + cfg_node = of_find_compatible_node(NULL, NULL,
> > > + "mediatek,generic-
> > > pciecfg");
> > > + if (cfg_node) {
> > > + pcie->cfg = syscon_node_to_regmap(cfg_node);
> > > + if (IS_ERR(pcie->cfg))
> > > + return PTR_ERR(pcie->cfg);
> > > + }
> > > +
> > > pcie->free_ck = devm_clk_get(dev, "free_ck");
> > > if (IS_ERR(pcie->free_ck)) {
> > > if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)
> > > @@ -1027,22 +1048,27 @@ static int mtk_pcie_setup(struct mtk_pcie
> > > *pcie)
> > > struct device *dev = pcie->dev;
> > > struct device_node *node = dev->of_node, *child;
> > > struct mtk_pcie_port *port, *tmp;
> > > - int err;
> > > + int err, slot;
> > > +
> > > + slot = of_get_pci_domain_nr(dev->of_node);
> > > + if (slot < 0) {
> > > + for_each_available_child_of_node(node, child) {
> > > + err = of_pci_get_devfn(child);
> > > + if (err < 0) {
> > > + dev_err(dev, "failed to get devfn:
> > > %d\n", err);
> > > + goto error_put_node;
> > > + }
> > >
> > > - for_each_available_child_of_node(node, child) {
> > > - int slot;
> > > + slot = PCI_SLOT(err);
> > >
> > > - err = of_pci_get_devfn(child);
> > > - if (err < 0) {
> > > - dev_err(dev, "failed to parse devfn: %d\n",
> > > err);
> > > - goto error_put_node;
> > > + err = mtk_pcie_parse_port(pcie, child,
> > > slot);
> > > + if (err)
> > > + goto error_put_node;
> > > }
> > > -
> > > - slot = PCI_SLOT(err);
> > > -
> > > - err = mtk_pcie_parse_port(pcie, child, slot);
> > > + } else {
> > > + err = mtk_pcie_parse_port(pcie, node, slot);
> > > if (err)
> > > - goto error_put_node;
> > > + return err;
> >
> > Hi，Rob
> > I changed this in the v9 version:
> > When the new dts format is used, of_node_get() is not called.
> > So when mtk_pcie_parse_port fails, of_node_put don't need to be
> > called.
> > if you still ok for this, I will add R-b in next version.
>
> Yes, and that's small enough change to keep my R-b.
>
> Rob

Hi, Rob
Thanks for your review.

Hi lorenzo
If there are no more comments, can this series be merged?

Best Regards