Re: [PATCH v2 4/8] tty: serial: samsung: Init USI to keep clocks running
From: Krzysztof Kozlowski
Date: Mon Aug 09 2021 - 06:46:57 EST
On 06/08/2021 17:21, Sam Protsenko wrote:
> UART block is a part of USI (Universal Serial Interface) IP-core in
> Samsung SoCs since Exynos9810 (e.g. in Exynos850). USI allows one to
> enable one of three types of serial interface: UART, SPI or I2C. That's
> possible because USI shares almost all internal circuits within each
> protocol. USI also provides some additional registers so it's possible
> to configure it.
>
> One USI register called USI_OPTION has reset value of 0x0. Because of
> this the clock gating behavior is controlled by hardware (HWACG =
> Hardware Auto Clock Gating), which simply means the serial won't work
> after reset as is. In order to make it work, USI_OPTION[2:1] bits must
> be set to 0b01, so that HWACG is controlled manually (by software).
> Bits meaning:
> - CLKREQ_ON = 1: clock is continuously provided to IP
> - CLKSTOP_ON = 0: drive IP_CLKREQ to High (needs to be set along with
> CLKREQ_ON = 1)
>
> USI is not present on older chips, like s3c2410, s3c2412, s3c2440,
> s3c6400, s5pv210, exynos5433, exynos4210. So the new boolean field
> '.has_usi' was added to struct s3c24xx_uart_info. USI registers will be
> only actually accessed when '.has_usi' field is set to "1".
>
> This feature is needed for further serial enablement on Exynos850, but
> some other new Exynos chips (like Exynos9810) may benefit from this
> feature as well.
>
> Signed-off-by: Sam Protsenko <semen.protsenko@xxxxxxxxxx>
> ---
> Changes in v2:
> - Non-intrusive modification of USI registers
> - Improved comments
> - Rearranged USI register definitions to conform with existing style
>
> drivers/tty/serial/samsung_tty.c | 32 +++++++++++++++++++++++++++++++-
> include/linux/serial_s3c.h | 9 +++++++++
> 2 files changed, 40 insertions(+), 1 deletion(-)
>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxxxxx>
Best regards,
Krzysztof