[irqchip: irq/irqchip-next] irqchip/gic: Convert to handle_strict_flow_irq()
From: irqchip-bot for Valentin Schneider
Date: Thu Aug 12 2021 - 11:13:06 EST
The following commit has been merged into the irq/irqchip-next branch of irqchip:
Commit-ID: 5bd8e3224b617caa4b628d6c7a06ba8f72174064
Gitweb: https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/5bd8e3224b617caa4b628d6c7a06ba8f72174064
Author: Valentin Schneider <valentin.schneider@xxxxxxx>
AuthorDate: Tue, 29 Jun 2021 13:50:09 +01:00
Committer: Marc Zyngier <maz@xxxxxxxxxx>
CommitterDate: Thu, 12 Aug 2021 15:48:21 +01:00
irqchip/gic: Convert to handle_strict_flow_irq()
Now that the proper infrastructure is in place, convert the irq-gic chip to
use handle_strict_flow_irq() along with IRQCHIP_AUTOMASKS_FLOW.
For EOImode=1, the Priority Drop is moved from gic_handle_irq() into
chip->irq_ack(). This effectively pushes the EOI write down into
->handle_irq(), but doesn't change its ordering wrt the irqaction
handling.
The EOImode=1 irqchip also gains IRQCHIP_EOI_THREADED, which allows the
->irq_eoi() call to be deferred to the tail of ONESHOT IRQ threads. This
means a threaded ONESHOT IRQ can now be handled entirely without a single
chip->irq_mask() call.
EOImode=0 handling remains unchanged.
Signed-off-by: Valentin Schneider <valentin.schneider@xxxxxxx>
Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>
Link: https://lore.kernel.org/r/20210629125010.458872-13-valentin.schneider@xxxxxxx
---
drivers/irqchip/irq-gic.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index d329ec3..c88d8cc 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -344,8 +344,6 @@ static void __exception_irq_entry gic_handle_irq(struct pt_regs *regs)
if (unlikely(irqnr >= 1020))
break;
- if (static_branch_likely(&supports_deactivate_key))
- writel_relaxed(irqstat, cpu_base + GIC_CPU_EOI);
isb();
/*
@@ -1009,7 +1007,9 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int irq,
break;
default:
irq_domain_set_info(d, irq, hw, &gic->chip, d->host_data,
- handle_fasteoi_irq, NULL, NULL);
+ static_branch_likely(&supports_deactivate_key) ?
+ handle_strict_flow_irq : handle_fasteoi_irq,
+ NULL, NULL);
irq_set_probe(irq);
irqd_set_single_target(irqd);
break;
@@ -1113,8 +1113,16 @@ static void gic_init_chip(struct gic_chip_data *gic, struct device *dev,
if (use_eoimode1) {
gic->chip.irq_mask = gic_eoimode1_mask_irq;
+ gic->chip.irq_ack = gic_eoi_irq;
gic->chip.irq_eoi = gic_eoimode1_eoi_irq;
gic->chip.irq_set_vcpu_affinity = gic_irq_set_vcpu_affinity;
+
+ /*
+ * eoimode0 shouldn't expose FLOW_MASK because the priority
+ * drop is undissociable from the deactivation, and we do need
+ * the priority drop to happen within the flow handler.
+ */
+ gic->chip.flags |= IRQCHIP_AUTOMASKS_FLOW | IRQCHIP_EOI_THREADED;
}
if (gic == &gic_data[0]) {