Re: [PATCH] PCIe: limit Max Read Request Size on i.MX to 512 bytes
From: Rob Herring
Date: Fri Aug 13 2021 - 09:46:10 EST
On Fri, Aug 13, 2021 at 3:52 AM Krzysztof Hałasa <khalasa@xxxxxxx> wrote:
>
> DWC PCIe controller imposes limits on the Read Request Size that it can
> handle. For i.MX6 family it's fixed at 512 bytes by default.
>
> If a memory read larger than the limit is requested, the CPU responds
> with Completer Abort (CA) (on i.MX6 Unsupported Request (UR) is returned
> instead due to a design error).
>
> The i.MX6 documentation states that the limit can be changed by writing
> to the PCIE_PL_MRCCR0 register, however there is a fixed (and
> undocumented) maximum (CX_REMOTE_RD_REQ_SIZE constant). Tests indicate
> that values larger than 512 bytes don't work, though.
>
> This patch makes the RTL8111 work on i.MX6.
>
> Signed-off-by: Krzysztof Hałasa <khalasa@xxxxxxx>
>
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 0c473d75e625..a11ec93a8cd0 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -34,6 +34,9 @@ config PCI_DOMAINS_GENERIC
> config PCI_SYSCALL
> bool
>
> +config NEED_PCIE_MAX_MRRS
We don't need a config option for this. It's not much code and it will
effectively always be enabled with multi-platform kernels.
Rob