[PATCH v2 2/4] dt-bindings: sound: add rockchip i2s-tdm binding
From: Nicolas Frattaroli
Date: Fri Aug 20 2021 - 14:28:55 EST
This adds the YAML bindings for the Rockchip I2S/TDM audio driver.
Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@xxxxxxxxx>
---
.../bindings/sound/rockchip,i2s-tdm.yaml | 193 ++++++++++++++++++
1 file changed, 193 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml
diff --git a/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml
new file mode 100644
index 000000000000..1e8c1500ba40
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/rockchip,i2s-tdm.yaml
@@ -0,0 +1,193 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Rockchip I2S/TDM Controller
+
+description:
+ The Rockchip I2S/TDM Controller is a Time Division Multiplexed
+ audio interface found in various Rockchip SoCs, allowing up
+ to 8 channels of audio over a serial interface.
+
+maintainers:
+ - Nicolas Frattaroli <frattaroli.nicolas@xxxxxxxxx>
+
+properties:
+ compatible:
+ enum:
+ - rockchip,px30-i2s-tdm
+ - rockchip,rk1808-i2s-tdm
+ - rockchip,rk3308-i2s-tdm
+ - rockchip,rk3568-i2s-tdm
+ - rockchip,rv1126-i2s-tdm
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ dmas:
+ minItems: 1
+ maxItems: 2
+
+ dma-names:
+ minItems: 1
+ items:
+ - const: rx
+ - const: tx
+
+ clocks:
+ items:
+ - description: clock for TX
+ - description: clock for RX
+ - description: AHB clock driving the interface
+
+ clock-names:
+ items:
+ - const: mclk_tx
+ - const: mclk_rx
+ - const: hclk
+
+ rockchip,frame-width:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ default: 64
+ minimum: 32
+ maximum: 512
+ description:
+ Width of a frame, usually slot width multiplied by number of slots.
+ Must be even.
+
+ resets:
+ items:
+ - description: reset for TX
+ - description: reset for RX
+
+ reset-names:
+ items:
+ - const: tx-m
+ - const: rx-m
+
+ rockchip,cru:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ The phandle of the cru.
+ Required if both playback and capture are used, i.e. if rockchip,clk-trcm
+ is 0.
+
+ rockchip,grf:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ The phandle of the syscon node for the GRF register.
+
+ rockchip,mclk-calibrate:
+ description:
+ Enable mclk source calibration.
+ type: boolean
+
+ rockchip,trcm-sync-tx-only:
+ type: boolean
+ description: Use TX BCLK/LRCK for both TX and RX.
+
+ rockchip,trcm-sync-rx-only:
+ type: boolean
+ description: Use RX BCLK/LRCK for both TX and RX.
+
+ "#sound-dai-cells":
+ const: 0
+
+ rockchip,i2s-rx-route:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Defines the mapping of I2S RX sdis to I2S data bus lines.
+ By default, they are mapped one-to-one.
+ items:
+ - description: which sdi to connect to data line 0
+ - description: which sdi to connect to data line 1
+ - description: which sdi to connect to data line 2
+ - description: which sdi to connect to data line 3
+
+ rockchip,i2s-tx-route:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description:
+ Defines the mapping of I2S TX sdos to I2S data bus lines.
+ By default, they are mapped one-to-one.
+ items:
+ - description: which sdo to connect to data line 0
+ - description: which sdo to connect to data line 1
+ - description: which sdo to connect to data line 2
+ - description: which sdo to connect to data line 3
+
+ rockchip,tdm-fsync-half-frame:
+ description: Whether to use half frame fsync.
+ type: boolean
+
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - dmas
+ - dma-names
+ - clocks
+ - clock-names
+ - resets
+ - reset-names
+ - rockchip,grf
+ - "#sound-dai-cells"
+
+allOf:
+ - if:
+ properties:
+ rockchip,trcm-sync-tx-only: false
+ rockchip,trcm-sync-rx-only: false
+ then:
+ required:
+ - rockchip,cru
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/rk3568-cru.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/pinctrl/rockchip.h>
+
+ foo {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ i2s@fe410000 {
+ compatible = "rockchip,rk3568-i2s-tdm";
+ reg = <0x0 0xfe410000 0x0 0x1000>;
+ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
+ <&cru HCLK_I2S1_8CH>;
+ clock-names = "mclk_tx", "mclk_rx", "hclk";
+ dmas = <&dmac1 3>, <&dmac1 2>;
+ dma-names = "rx", "tx";
+ resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
+ reset-names = "tx-m", "rx-m";
+ rockchip,trcm-sync-tx-only;
+ rockchip,cru = <&cru>;
+ rockchip,grf = <&grf>;
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 =
+ <&i2s1m0_sclktx
+ &i2s1m0_sclkrx
+ &i2s1m0_lrcktx
+ &i2s1m0_lrckrx
+ &i2s1m0_sdi0
+ &i2s1m0_sdi1
+ &i2s1m0_sdi2
+ &i2s1m0_sdi3
+ &i2s1m0_sdo0
+ &i2s1m0_sdo1
+ &i2s1m0_sdo2
+ &i2s1m0_sdo3>;
+ status = "okay";
+ };
+ };
--
2.32.0