Re: [PATCH] arm64: dts: qcom: sc7280: fix display port phy base address offset
From: Bjorn Andersson
Date: Fri Aug 27 2021 - 13:19:13 EST
On Fri 27 Aug 09:55 PDT 2021, Kuogee Hsieh wrote:
So the order was mixed up, 0x088eaa00 got the wrong length and you got
one hardware block too many in there?
> Fixes: 9886e8fd8438 ("arm64: dts: qcom: sc7280: Add USB related nodes")
> Signed-off-by: Kuogee Hsieh <khsieh@xxxxxxxxxxxxxx>
> ---
> arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> index c29226b..77b0b4e 100644
> --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> @@ -2918,15 +2918,11 @@
> dp_phy: dp-phy@88ea200 {
> reg = <0 0x088ea200 0 0x200>,
> <0 0x088ea400 0 0x200>,
> - <0 0x088eac00 0 0x400>,
> + <0 0x088eaa00 0 0x200>,
> <0 0x088ea600 0 0x200>,
> - <0 0x088ea800 0 0x200>,
> - <0 0x088eaa00 0 0x100>;
> + <0 0x088ea800 0 0x200>;
> #phy-cells = <0>;
> #clock-cells = <1>;
> - clocks = <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> - clock-names = "pipe0";
> - clock-output-names = "usb3_phy_pipe_clk_src";
This is not "base address offset", please fix $subject.
Looking at this makes me feel that the dp-phy node was copy-pasted from
the usb3-node and that this patch corrects a copy-paste issue. Seems
like this would be an excellent thing to write in a commit message.
Thanks,
Bjorn
> };
> };
>
> --
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