drivers/mtd/nand/raw/intel-nand-controller.c:205:24: warning: Division by zero [clang-analyzer-core.DivideZero]

From: kernel test robot
Date: Mon Aug 30 2021 - 04:43:22 EST

tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 64b4fc45bea6f4faa843d2f97ff51665280efee1
commit: 0b1039f016e8a37c779a4aee362cb2100ebb1cfd mtd: rawnand: Add NAND controller support on Intel LGM SoC
date: 9 months ago
:::::: branch date: 11 hours ago
:::::: commit date: 9 months ago
config: powerpc-randconfig-c003-20210827 (attached as .config)
compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project ea08c4cd1c0869ec5024a8bb3f5cdf06ab03ae83)
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# install powerpc cross compiling tool for clang build
# apt-get install binutils-powerpc64-linux-gnu
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0b1039f016e8a37c779a4aee362cb2100ebb1cfd
git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
git fetch --no-tags linus master
git checkout 0b1039f016e8a37c779a4aee362cb2100ebb1cfd
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=powerpc clang-analyzer

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>


clang-analyzer warnings: (new ones prefixed by >>)

>> drivers/mtd/nand/raw/intel-nand-controller.c:205:24: warning: Division by zero [clang-analyzer-core.DivideZero]
unsigned int period = DIV_ROUND_UP(USEC_PER_SEC, rate);
^
include/linux/kernel.h:85:22: note: expanded from macro 'DIV_ROUND_UP'
#define DIV_ROUND_UP __KERNEL_DIV_ROUND_UP
^
include/uapi/linux/kernel.h:13:54: note: expanded from macro '__KERNEL_DIV_ROUND_UP'
#define __KERNEL_DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
~~~~~~~~~~~~~~~~^~~~~
drivers/mtd/nand/raw/intel-nand-controller.c:204:22: note: Calling 'clk_get_rate'
unsigned int rate = clk_get_rate(ctrl->clk) / HZ_PER_MHZ;
^~~~~~~~~~~~~~~~~~~~~~~
include/linux/clk.h:842:2: note: Returning zero
return 0;
^~~~~~~~
drivers/mtd/nand/raw/intel-nand-controller.c:204:22: note: Returning from 'clk_get_rate'
unsigned int rate = clk_get_rate(ctrl->clk) / HZ_PER_MHZ;
^~~~~~~~~~~~~~~~~~~~~~~
drivers/mtd/nand/raw/intel-nand-controller.c:204:2: note: 'rate' initialized to 0
unsigned int rate = clk_get_rate(ctrl->clk) / HZ_PER_MHZ;
^~~~~~~~~~~~~~~~~
drivers/mtd/nand/raw/intel-nand-controller.c:205:24: note: Division by zero
unsigned int period = DIV_ROUND_UP(USEC_PER_SEC, rate);
^


vim +205 drivers/mtd/nand/raw/intel-nand-controller.c

0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 199
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 200 static int ebu_nand_set_timings(struct nand_chip *chip, int csline,
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 201 const struct nand_interface_config *conf)
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 202 {
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 203 struct ebu_nand_controller *ctrl = nand_to_ebu(chip);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 204 unsigned int rate = clk_get_rate(ctrl->clk) / HZ_PER_MHZ;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 @205 unsigned int period = DIV_ROUND_UP(USEC_PER_SEC, rate);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 206 const struct nand_sdr_timings *timings;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 207 u32 trecov, thold, twrwait, trdwait;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 208 u32 reg = 0;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 209
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 210 timings = nand_get_sdr_timings(conf);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 211 if (IS_ERR(timings))
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 212 return PTR_ERR(timings);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 213
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 214 if (csline == NAND_DATA_IFACE_CHECK_ONLY)
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 215 return 0;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 216
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 217 trecov = DIV_ROUND_UP(max(timings->tREA_max, timings->tREH_min),
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 218 period);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 219 reg |= EBU_BUSCON_RECOVC(trecov);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 220
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 221 thold = DIV_ROUND_UP(max(timings->tDH_min, timings->tDS_min), period);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 222 reg |= EBU_BUSCON_HOLDC(thold);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 223
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 224 trdwait = DIV_ROUND_UP(max(timings->tRC_min, timings->tREH_min),
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 225 period);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 226 reg |= EBU_BUSCON_WAITRDC(trdwait);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 227
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 228 twrwait = DIV_ROUND_UP(max(timings->tWC_min, timings->tWH_min), period);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 229 reg |= EBU_BUSCON_WAITWRC(twrwait);
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 230
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 231 reg |= EBU_BUSCON_CMULT_V4 | EBU_BUSCON_BCGEN_CS | EBU_BUSCON_ALEC |
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 232 EBU_BUSCON_SETUP_EN;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 233
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 234 writel(reg, ctrl->ebu + EBU_BUSCON(ctrl->cs_num));
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 235
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 236 return 0;
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 237 }
0b1039f016e8a3 Ramuthevar Vadivel Murugan 2020-11-10 238

---
0-DAY CI Kernel Test Service, Intel Corporation
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Attachment: .config.gz
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