[PATCH v3 4/5] MFD: intel_pmt: Add DG2 support
From: David E. Box
Date: Wed Sep 22 2021 - 17:30:37 EST
Add Platform Monitoring Technology support for DG2 platforms.
Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx>
---
V3: No change
V2: New patch
drivers/mfd/intel_pmt.c | 9 +++++++++
drivers/platform/x86/intel/pmt/class.c | 2 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/mfd/intel_pmt.c b/drivers/mfd/intel_pmt.c
index 08e07b31aeec..a6fe50f65479 100644
--- a/drivers/mfd/intel_pmt.c
+++ b/drivers/mfd/intel_pmt.c
@@ -94,6 +94,11 @@ static const struct pmt_platform_info dg1_info = {
.capabilities = dg1_capabilities,
};
+/* DG2 Platform */
+static const struct pmt_platform_info dg2_info = {
+ .quirks = PMT_QUIRK_TABLE_SHIFT
+};
+
static bool intel_ext_cap_allowed(u16 id)
{
int i;
@@ -334,11 +339,15 @@ static void pmt_pci_remove(struct pci_dev *pdev)
#define PCI_DEVICE_ID_INTEL_PMT_ADL 0x467d
#define PCI_DEVICE_ID_INTEL_PMT_DG1 0x490e
+#define PCI_DEVICE_ID_INTEL_PMT_DG2_G10 0x4f93
+#define PCI_DEVICE_ID_INTEL_PMT_DG2_G11 0x4f95
#define PCI_DEVICE_ID_INTEL_PMT_OOBMSM 0x09a7
#define PCI_DEVICE_ID_INTEL_PMT_TGL 0x9a0d
static const struct pci_device_id pmt_pci_ids[] = {
{ PCI_DEVICE_DATA(INTEL, PMT_ADL, &tgl_info) },
{ PCI_DEVICE_DATA(INTEL, PMT_DG1, &dg1_info) },
+ { PCI_DEVICE_DATA(INTEL, PMT_DG2_G10, &dg2_info) },
+ { PCI_DEVICE_DATA(INTEL, PMT_DG2_G11, &dg2_info) },
{ PCI_DEVICE_DATA(INTEL, PMT_OOBMSM, NULL) },
{ PCI_DEVICE_DATA(INTEL, PMT_TGL, &tgl_info) },
{ }
diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/intel/pmt/class.c
index 659b1073033c..f2a8e19a02e7 100644
--- a/drivers/platform/x86/intel/pmt/class.c
+++ b/drivers/platform/x86/intel/pmt/class.c
@@ -29,6 +29,8 @@
static const struct pci_device_id pmt_telem_early_client_pci_ids[] = {
{ PCI_VDEVICE(INTEL, 0x467d) }, /* ADL */
{ PCI_VDEVICE(INTEL, 0x490e) }, /* DG1 */
+ { PCI_VDEVICE(INTEL, 0x4f93) }, /* DG2_G10 */
+ { PCI_VDEVICE(INTEL, 0x4f95) }, /* DG2_G11 */
{ PCI_VDEVICE(INTEL, 0x9a0d) }, /* TGL */
{ }
};
--
2.25.1