Re: [PATCH V3 1/3] perf/x86: Add new event for AUX output counter index

[Alexander Shishkin]

Adrian Hunter <adrian.hunter@xxxxxxxxx> writes:

> On 10/09/21 7:29 pm, Liang, Kan wrote:
>> 
>> 
>> On 9/10/2021 12:04 PM, Peter Zijlstra wrote:
>>> On Tue, Sep 07, 2021 at 01:45:22PM -0400, Liang, Kan wrote:
>>>> On 9/7/2021 12:39 PM, Adrian Hunter wrote:
>>>
>>>>> @@ -4494,8 +4500,16 @@ static int intel_pmu_check_period(struct perf_event *event, u64 value)
>>>>>        return intel_pmu_has_bts_period(event, value) ? -EINVAL : 0;
>>>>>    }
>>>>> +static void intel_aux_output_init(void)
>>>>> +{
>>>>> +    /* Refer also intel_pmu_aux_output_match() */
>>>>> +    if (x86_pmu.intel_cap.pebs_output_pt_available)
>>>>> +        x86_pmu.assign = intel_pmu_assign_event;
>>>>> +}
>>>>
>>>> For a hybrid machine, x86_pmu.intel_cap.pebs_output_pt_available is always
>>>> cleared. We probably need the PMU specific
>>>> pmu->intel_cap.pebs_output_pt_available here.
>>>>
>>>>> +
>>>>>    static int intel_pmu_aux_output_match(struct perf_event *event)
>>>>>    {
>>>>> +    /* intel_pmu_assign_event() is needed, refer intel_aux_output_init() */
>>>>>        if (!x86_pmu.intel_cap.pebs_output_pt_available)
>>>>>            return 0;
>>>>>
>>>>
>>>> For a hybrid machine, this always return 0. I think we need to fix it first?
>>>
>>> AFAICT the patch is correct for !hybrid, and the hybrid PT muck can then
>>> also fix this up, right?
>>>
>> 
>> Yes, for !hybrid, the patch is good.
>> 
>> Since PEBS via PT is temporarily disabled for hybrid for now, the patch set should not bring any issues with hybrid either.
>> The hybrid PT can be fixed separately.
>
> I don't have much time to look at the hybrid case right now.
>
> Would it be OK to go ahead with these patches?

I'll deal with the PEBS-via-PT on hybrid. As it stands right now, this
patchset is good.

Regards,
--
Alex