Re: [PATCH 6/6] staging: mt7621-pci: properly adjust base address for the IO window

From: Arnd Bergmann
Date: Sat Sep 25 2021 - 13:33:26 EST

On Fri, Sep 24, 2021 at 11:11 PM Sergio Paracuellos
<sergio.paracuellos@xxxxxxxxx> wrote:
> The value to adjust in the bridge register RALINK_PCI_IOBASE must take into
> account the raw value from DT, not only the translated linux port number.
> As long as io_offset is zero, the two are the same, but if you were to use
> multiple host bridge in the system, or pick a different bus address in DT,
> you can have a nonzero io_offset. At this means to take into account the
> bus address which is used to calculate this offset, substracting it from
> the IO resource start address.
> Signed-off-by: Sergio Paracuellos <sergio.paracuellos@xxxxxxxxx>

Acked-by: Arnd Bergmann <arnd@xxxxxxxx>