Re: [RESEND PATCH] x86: ACPI: cstate: Optimize C3 entry on AMD CPUs

[Thomas Gleixner]

On Fri, Sep 24 2021 at 18:48, Rafael J. Wysocki wrote:

> On Fri, Sep 24, 2021 at 8:12 AM Deepak Sharma <deepak.sharma@xxxxxxx> wrote:
>>
>> All Zen or newer CPU which support C3 shares cache. Its not necessary to
>> flush the caches in software before entering C3. This will cause drop in
>> performance for the cores which share some caches. ARB_DIS is not used
>> with current AMD C state implementation. So set related flags correctly.
>>
>> Signed-off-by: Deepak Sharma <deepak.sharma@xxxxxxx>
>
> I'm planning to take this one unless the x86 maintainers have concerns, thanks.

Acked-by: Thomas Gleixner <tglx@xxxxxxxxxxxxx>