Re: [PATCH Part2 v5 05/45] x86/sev: Add helper functions for RMPUPDATE and PSMASH instruction

[Brijesh Singh]

On 9/24/21 9:04 AM, Borislav Petkov wrote:
> On Fri, Aug 20, 2021 at 10:58:38AM -0500, Brijesh Singh wrote:
> > The RMPUPDATE instruction writes a new RMP entry in the RMP Table. The
> > hypervisor will use the instruction to add pages to the RMP table. See
> > APM3 for details on the instruction operations.
> >
> > The PSMASH instruction expands a 2MB RMP entry into a corresponding set of
> > contiguous 4KB-Page RMP entries. The hypervisor will use this instruction
> > to adjust the RMP entry without invalidating the previous RMP entry.
> >
> > Signed-off-by: Brijesh Singh <brijesh.singh@xxxxxxx>
> > ---
> >   arch/x86/include/asm/sev.h | 11 ++++++
> >   arch/x86/kernel/sev.c      | 72 ++++++++++++++++++++++++++++++++++++++
> >   2 files changed, 83 insertions(+)
> >
> > diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h
> > index 5b1a6a075c47..92ced9626e95 100644
> > --- a/arch/x86/include/asm/sev.h
> > +++ b/arch/x86/include/asm/sev.h
> > @@ -78,7 +78,9 @@ extern bool handle_vc_boot_ghcb(struct pt_regs *regs);
> >   
> >   /* RMP page size */
> >   #define RMP_PG_SIZE_4K			0
> > +#define RMP_PG_SIZE_2M			1
> >   #define RMP_TO_X86_PG_LEVEL(level)	(((level) == RMP_PG_SIZE_4K) ? PG_LEVEL_4K : PG_LEVEL_2M)
> > +#define X86_TO_RMP_PG_LEVEL(level)	(((level) == PG_LEVEL_4K) ? RMP_PG_SIZE_4K : RMP_PG_SIZE_2M)
> >   
> >   /*
> >    * The RMP entry format is not architectural. The format is defined in PPR
> > @@ -107,6 +109,15 @@ struct __packed rmpentry {
> >   
> >   #define RMPADJUST_VMSA_PAGE_BIT		BIT(16)
> >   
> > +struct rmpupdate {
>
> Function is called the same way - maybe this should be called
> rmpupdate_desc or so.

Noted.


> > +
> > +	return ret;
> > +}
> > +EXPORT_SYMBOL_GPL(psmash);
>
> That's for kvm?

Yes.

...

> > +EXPORT_SYMBOL_GPL(rmp_make_shared);
>
> Both exports for kvm I assume?

yes, both KVM and CCP drivers need them.

thanks