Re: [PATCH V2 16/41] x86/entry: Implement the whole error_entry() as C code

[Brian Gerst]

On Sun, Sep 26, 2021 at 11:13 AM Lai Jiangshan <jiangshanlai@xxxxxxxxx> wrote:
>
> From: Lai Jiangshan <laijs@xxxxxxxxxxxxxxxxx>
>
> All the needed facilities are set in entry64.c, the whole error_entry()
> can be implemented in C in entry64.c.  The C version generally has better
> readability and easier to be updated/improved.
>
> No function change intended. Only a check for X86_FEATURE_XENPV is added
> because the new error_entry() does not use the pv SWAPGS, rather it uses
> native_swapgs().  And for XENPV, error_entry() has nothing to do, so it
> can return directly.
>
> Signed-off-by: Lai Jiangshan <laijs@xxxxxxxxxxxxxxxxx>
> ---
>  arch/x86/entry/entry64.c     | 76 ++++++++++++++++++++++++++++++++++
>  arch/x86/entry/entry_64.S    | 80 +-----------------------------------
>  arch/x86/include/asm/traps.h |  1 +
>  3 files changed, 78 insertions(+), 79 deletions(-)
>
> diff --git a/arch/x86/entry/entry64.c b/arch/x86/entry/entry64.c
> index dafae60d31f9..5f2be4c3f333 100644
> --- a/arch/x86/entry/entry64.c
> +++ b/arch/x86/entry/entry64.c
> @@ -56,3 +56,78 @@ static __always_inline void kernel_entry_fence_no_swapgs(void)
>  {
>         alternative("", "lfence", X86_FEATURE_FENCE_SWAPGS_KERNEL);
>  }
> +
> +/*
> + * Put pt_regs onto the task stack and switch GS and CR3 if needed.
> + * The actual stack switch is done in entry_64.S.
> + *
> + * Becareful, it might be in the user CR3 and user GS base at the start
> + * of the function.
> + */
> +asmlinkage __visible __entry_text
> +struct pt_regs *error_entry(struct pt_regs *eregs)
> +{
> +       unsigned long iret_ip = (unsigned long)native_irq_return_iret;
> +
> +       asm volatile ("cld");

The C ABI states that the direction flag must be clear on function
entry and exit, so the CLD instruction needs to remain in the asm
code.

https://refspecs.linuxbase.org/elf/x86_64-abi-0.99.pdf#subsection.3.2.1

--
Brian Gerst