RE: [PATCH 10/10] dt-bindings: mmc: aspeed: Add a new compatible string

[Chin-Ting Kuo]

Hi Rob

> -----Original Message-----
> From: Rob Herring <robh@xxxxxxxxxx>
> Sent: Wednesday, September 29, 2021 6:28 AM
> To: Chin-Ting Kuo <chin-ting_kuo@xxxxxxxxxxxxxx>
> Subject: Re: [PATCH 10/10] dt-bindings: mmc: aspeed: Add a new compatible
> string
> 
> On Mon, Sep 27, 2021 at 9:51 PM Chin-Ting Kuo
> <chin-ting_kuo@xxxxxxxxxxxxxx> wrote:
> >
> > Hi Rob,
> >
> > > -----Original Message-----
> > > From: Rob Herring <robh@xxxxxxxxxx>
> > > Sent: Tuesday, September 28, 2021 2:59 AM
> > > To: Chin-Ting Kuo <chin-ting_kuo@xxxxxxxxxxxxxx>
> > > Subject: Re: [PATCH 10/10] dt-bindings: mmc: aspeed: Add a new
> > > compatible string
> > >
> > > On Wed, Sep 22, 2021 at 06:31:16PM +0800, Chin-Ting Kuo wrote:
> > > > Add "aspeed,ast2600-emmc" compatible string for the sake of
> > > > distinguishing between SD and eMMC device.
> > >
> > > Why?
> > >
> > > Is the h/w block different? We already have properties to handle
> > > some of the eMMC specifics. Also, you can have a child node for the
> > > eMMC device if you need that.
> >
> > There are two SD/SDIO controllers in a AST2600 SoC.
> > One is for SD card and the other is for eMMC.
> > Although both of them are embedded in the same SoC, the design of
> > delay cell and the manufacture process are different. The delay phase
> > is definitely different and, thus, we need a flag, compatible, to distinguish the
> device, SD or eMMC.
> >
> > Without "aspeed,ast2600-emmc" compatible, of course, eMMC device can
> > work with original sdhci driver and device tree setting. But, for
> > ultra-speed or HS200 case, AST2600 SoC needs some phase delay which
> (maximum) value is different between SD and eMMC device.
> 
> This is quite common as tweaking the timing is also need per board.
> Look at what other bindings have done. A property is more appropriate here.

Okay, I will try to check whether there is an existing binding which can achieve this purpose.
Or, maybe, as you said, a property is better since this phase delay is a proprietary
HW design and is different between each chipset version.

> 
> Rob

Chin-Ting