Re: [RFC 00/19] Add interconnect and devfreq support for i.MX8MQ

From: Abel Vesa
Date: Wed Sep 29 2021 - 07:44:46 EST

On 21-09-24 12:20:26, Martin Kepplinger wrote:
> hi Abel,
>
> thank you for the update (this is actually v2 of this RFC right?)!
>
> all in all this runs fine on the imx8mq (Librem 5 and devkit) I use. For all
> the pl301 nodes I'm not yet sure what I can actually test / switch frequencies.
>

You can start by looking into each of the following:

$ ls -1d /sys/devices/platform/soc@0/*/devfreq/*/trans_stat

and look if the transitions happen when a specific driver that is a icc user suspends.

You can also look at:

/sys/kernel/debug/interconnect/interconnect_summary

and:

/sys/kernel/debug/interconnect/interconnect_graph

> But I still have one problem: lcdif/mxfb already has the interconnect dram
> DT property and I use the following call to request bandwidth:
> https://source.puri.sm/martin.kepplinger/linux-next/-/commit/d690e4c021293f938eb2253607f92f5a64f15688
> (mainlining this is on our todo list).
>
> With your patchset, I get:
>
> [ 0.792960] genirq: Flags mismatch irq 30. 00000004 (mxsfb-drm) vs. 00000004 (mxsfb-drm)
> [ 0.801143] mxsfb 30320000.lcd-controller: Failed to install IRQ handler
> [ 0.808058] mxsfb: probe of 30320000.lcd-controller failed with error -16
>
> so the main devfreq user (mxsfb) is not there :) why?
>

OK, I admit, this patchset doesn't provide support for all the icc consumer drivers.
But that should come at a later stage. I only provided example like fec and usdhc, to show
how it all fits together.

> and when I remove the interconnect property from the lcdif DT node, mxsfb
> probes again, but of course it doesn't lower dram freq as needed.
>
> Do I do the icc calls wrong in mxsfb despite it working without your
> patchset, or may there be something wrong on your side that breaks
> the mxsfb IRQ?
>

Do you have the following changes into your tree?

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index 00dd8e39a595..c43a84622af5 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -524,7 +524,7 @@ lcdif: lcd-controller@30320000 {
<&clk IMX8MQ_VIDEO_PLL1>,
<&clk IMX8MQ_VIDEO_PLL1_OUT>;
assigned-clock-rates = <0>, <0>, <0>, <594000000>;
- interconnects = <&noc IMX8MQ_ICM_LCDIF &noc IMX8MQ_ICS_DRAM>;
+ interconnects = <&icc IMX8MQ_ICM_LCDIF &icc IMX8MQ_ICS_DRAM>;
interconnect-names = "dram";
status = "disabled";

@@ -1117,7 +1117,7 @@ mipi_csi1: csi@30a70000 {
<&src IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET>,
<&src IMX8MQ_RESET_MIPI_CSI1_ESC_RESET>;
fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;
- interconnects = <&noc IMX8MQ_ICM_CSI1 &noc IMX8MQ_ICS_DRAM>;
+ interconnects = <&icc IMX8MQ_ICM_CSI1 &icc IMX8MQ_ICS_DRAM>;
interconnect-names = "dram";
status = "disabled";

@@ -1169,7 +1169,7 @@ mipi_csi2: csi@30b60000 {
<&src IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET>,
<&src IMX8MQ_RESET_MIPI_CSI2_ESC_RESET>;
fsl,mipi-phy-gpr = <&iomuxc_gpr 0xa4>;
- interconnects = <&noc IMX8MQ_ICM_CSI2 &noc IMX8MQ_ICS_DRAM>;
+ interconnects = <&icc IMX8MQ_ICM_CSI2 &icc IMX8MQ_ICS_DRAM>;
interconnect-names = "dram";
status = "disabled";

I forgot to update these in the current version of the patchset. Will do in the next version.

Also, would help a lot if you could give me a link to a tree you're testing with.
That way I can look exactly at what's going on.

> again thanks a lot for working on this! I'm always happy to test.
>
> martin
>
>
>
> ---
> .../boot/dts/freescale/imx8mq-librem5.dtsi | 20 -------------------
> 1 file changed, 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> index 6fac6676f412..8496a90f23bf 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> @@ -381,26 +381,6 @@ &A53_3 {
> cpu-supply = <&buck2_reg>;
> };
>
> -&ddrc {
> - operating-points-v2 = <&ddrc_opp_table>;
> -
> - ddrc_opp_table: ddrc-opp-table {
> - compatible = "operating-points-v2";
> -
> - opp-25M {
> - opp-hz = /bits/ 64 <25000000>;
> - };
> -
> - opp-100M {
> - opp-hz = /bits/ 64 <100000000>;
> - };
> -
> - opp-800M {
> - opp-hz = /bits/ 64 <800000000>;
> - };
> - };
> -};
> -
> &dphy {
> status = "okay";
> };
> --
> 2.30.2
>