Re: [PATCH 6/6] memory: renesas-rpc-if: Add support for RZ/G2L

[Wolfram Sang]

Hi Prabhakar,

some updates after internal discussions I had.

> +#define RPCIF_CMNCR_MOIIO_HIZ(val) (RPCIF_CMNCR_MOIIO0(val) | \
> +				 RPCIF_CMNCR_MOIIO1(val) | \
> +				 RPCIF_CMNCR_MOIIO2(val) | RPCIF_CMNCR_MOIIO3(val))

Shimoda-san rightfully said that '_HIZ' should be removed from the macro
name because HIZ implies the value 3.


>  #define RPCIF_CMNCR_IO3FV(val)	(((val) & 0x3) << 14) /* undocumented */
>  #define RPCIF_CMNCR_IO2FV(val)	(((val) & 0x3) << 12) /* undocumented */

As discussed before, mention here that they are documented for G2L.
Sadly, we can't use them with Gen3...

> -#define RPCIF_CMNCR_IOFV_HIZ	(RPCIF_CMNCR_IO0FV(3) | RPCIF_CMNCR_IO2FV(3) | \
> -				 RPCIF_CMNCR_IO3FV(3))
> +#define RPCIF_CMNCR_IOFV_HIZ(val) (RPCIF_CMNCR_IO0FV(val) | RPCIF_CMNCR_IO2FV(val) | \
> +				 RPCIF_CMNCR_IO3FV(val))

... which means we should remove this macro entirely because it is
forbidden for Gen3. I think it is best to use the RPCIF_CMNCR_IO<n>FV
macros directly where we need them.

Do you agree?

Kind regards,

   Wolfram

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