RE: [PATCH v5 3/4] perf/marvell: cn10k DDR perfmon event overflow handling
From: Bhaskara Budiredla
Date: Mon Oct 18 2021 - 00:38:13 EST
>Two fixed event counters starts counting from zero on overflow, so overflow
>condition is when new count less than previous count. While eight
>programmable event counters freezes at maximum value. Also individual
>counter cannot be restarted, so need to restart all eight counters.
>
>Signed-off-by: Bharat Bhushan <bbhushan2@xxxxxxxxxxx>
>---
Reviewed-by: Bhaskara Budiredla <bbudiredla@xxxxxxxxxxx>