Re: [PATCH 1/1] dt-bindings: T-HEAD CLINT

[Heinrich Schuchardt]

On 10/22/21 23:22, Rob Herring wrote:
> On Wed, Oct 20, 2021 at 11:36:03AM +0200, Heinrich Schuchardt wrote:
> > The CLINT in the T-HEAD 9xx CPUs is similar to the SiFive CLINT but does
> > not support 64bit mmio access to the MTIMER device.
> >
> > OpenSBI currently uses a property 'clint,has-no-64bit-mmio' to indicate the
> > restriction and the "sifive,cling0" compatible string. An OpenSBI
> > patch suggested to use "reg-io-width = <4>;" as the reg-io-width property
> > is generally used in the devicetree schema for such a condition.
> >
> > As the design is not SiFive based it is preferable to apply a compatible
> > string identifying T-HEAD instead.
> >
> > Add a new yaml file describing the T-HEAD CLINT.
> >
> > Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@xxxxxxxxxxxxx>
> > ---
> > @Palmer, @Anup
> > I copied you as maintainers from sifive,clint.yaml. Please, indicate if
> > this should be changed.
> >
> > For the prior discussion see:
> > https://lore.kernel.org/all/20211015100941.17621-1-heinrich.schuchardt@xxxxxxxxxxxxx/
> > https://lore.kernel.org/all/20211015120735.27972-1-heinrich.schuchardt@xxxxxxxxxxxxx/
> >
> > A release candidate of the ACLINT specification is available at
> > https://github.com/riscv/riscv-aclint/releases
> > ---
> >   .../bindings/timer/thead,clint.yaml           | 62 +++++++++++++++++++
> >   1 file changed, 62 insertions(+)
> >   create mode 100644 Documentation/devicetree/bindings/timer/thead,clint.yaml
> >
> > diff --git a/Documentation/devicetree/bindings/timer/thead,clint.yaml b/Documentation/devicetree/bindings/timer/thead,clint.yaml
> > new file mode 100644
> > index 000000000000..02463fb2043a
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/timer/thead,clint.yaml
> > @@ -0,0 +1,62 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/timer/thead,clint.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: SiFive Core Local Interruptor
> > +
> > +maintainers:
> > +  - Palmer Dabbelt <palmer@xxxxxxxxxxx>
> > +  - Anup Patel <anup.patel@xxxxxxx>
> > +
> > +description:
> > +  T-HEAD (and other RISC-V) SOCs include an implementation of the T-HEAD
> > +  Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
> > +  interrupts. It directly connects to the timer and inter-processor interrupt
> > +  lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
> > +  interrupt controller is the parent interrupt controller for CLINT device.
> > +  The clock frequency of the CLINT is specified via "timebase-frequency" DT
> > +  property of "/cpus" DT node. The "timebase-frequency" DT property is
> > +  described in Documentation/devicetree/bindings/riscv/cpus.yaml
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const:
> > +          - allwinner,sun20i-d1-clint
> > +      - const:
> > +          - thead,clint0
> > +
> > +    description:
> > +      Should be "<vendor>,<chip>-clint" and "thead,clint<version>" for
> > +      the T-HEAD derived CLINTs.
> > +      Supported compatible strings are -
> > +      "allwinner,sun20i-d1-clint" for the CLINT in the Allwinner D1 SoC
> > +      and "thead,clint0" for the T-HEAD IP block with no chip
> > +      integration tweaks.
>
> T-HEAD uses the same versioning as SiFive? If you use version numbers in
> compatible strings, the numbering needs to be documented and correlate
> back to the h/w design. See [1]. IP release numbers for FPGA IP for
> example. What it should not be is the binding author making up 0, 1, 2,
> etc. versions.

The only publicly available information on the IP block is:

https://github.com/T-head-Semi/openc906/blob/main/doc/%E7%8E%84%E9%93%81C906%E7%94%A8%E6%88%B7%E6%89%8B%E5%86%8C.pdf

Page 3 has a version number for the whole document. Chapter 9 does not 
have any version number for the CLINT. So should we simply call the 
block "thead,clint" without any version number?

@Guo: do you have more information accessible?

Best regards

Heinrich

> Rob
>
> [1] Documentation/devicetree/bindings/sifive/sifive-blocks-ip-versioning.txt