RE: [PATCH v4 0/8] add the imx8m pcie phy driver and imx8mm pcie support

From: Richard Zhu
Date: Thu Oct 28 2021 - 21:12:00 EST


> -----Original Message-----
> From: Tim Harvey <tharvey@xxxxxxxxxxxxx>
> Sent: Friday, October 29, 2021 2:17 AM
> To: Richard Zhu <hongxing.zhu@xxxxxxx>
> Cc: Lucas Stach <l.stach@xxxxxxxxxxxxxx>; Marcel Ziswiler
> <marcel.ziswiler@xxxxxxxxxxx>; Kishon Vijay Abraham I
> <kishon@xxxxxx>; vkoul@xxxxxxxxxx; Rob Herring <robh@xxxxxxxxxx>;
> galak@xxxxxxxxxxxxxxxxxxx; Shawn Guo <shawnguo@xxxxxxxxxx>;
> linux-phy@xxxxxxxxxxxxxxxxxxx; Device Tree Mailing List
> <devicetree@xxxxxxxxxxxxxxx>; Linux ARM Mailing List
> <linux-arm-kernel@xxxxxxxxxxxxxxxxxxx>; open list
> <linux-kernel@xxxxxxxxxxxxxxx>; Sascha Hauer <kernel@xxxxxxxxxxxxxx>;
> dl-linux-imx <linux-imx@xxxxxxx>
> Subject: Re: [PATCH v4 0/8] add the imx8m pcie phy driver and imx8mm
> pcie support
>
> On Thu, Oct 28, 2021 at 12:52 AM Richard Zhu <hongxing.zhu@xxxxxxx>
> wrote:
> >
> > Refer to the discussion [1] when try to enable i.MX8MM PCIe support,
> > one standalone PCIe PHY driver should be seperated from i.MX PCIe
> > driver when enable i.MX8MM PCIe support.
> >
> > This patch-set adds the standalone PCIe PHY driver suport[1-5], and
> > i.MX8MM PCIe support[6-8] to have whole view to review this
> patch-set.
> >
> > The PCIe works on i.MX8MM EVK board based the the blkctrl power
> driver
> > [2] and this patch-set.
> >
> > [1]
> >
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa
> tc
> >
> hwork.ozlabs.org%2Fproject%2Flinux-pci%2Fpatch%2F20210510141509.
> 929120
> >
> -3-l.stach%40pengutronix.de%2F&amp;data=04%7C01%7Chongxing.zhu
> %40nxp.c
> >
> om%7C90b27fd98a4d47a5a68c08d99a3f32e3%7C686ea1d3bc2b4c6fa92
> cd99c5c3016
> >
> 35%7C0%7C0%7C637710418493785262%7CUnknown%7CTWFpbGZsb3d
> 8eyJWIjoiMC4wLj
> >
> AwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C1000&
> amp;sdata=
> >
> K%2B5UzVRndlp9qJT9RlkQp2qzKAx%2B76xwMd51xHLEZKI%3D&amp;re
> served=0
> > [2]
> >
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpa
> tc
> >
> hwork.kernel.org%2Fproject%2Flinux-arm-kernel%2Fcover%2F20210910
> 202640
> > .980366-1-l.stach%40pengutronix.de%2F&amp;data=04%7C01%7Chon
> gxing.zhu%
> >
> 40nxp.com%7C90b27fd98a4d47a5a68c08d99a3f32e3%7C686ea1d3bc2b
> 4c6fa92cd99
> >
> c5c301635%7C0%7C0%7C637710418493795238%7CUnknown%7CTWFp
> bGZsb3d8eyJWIjo
> >
> iMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%
> 7C1000&amp
> > ;sdata=kKpDrUNfZy0qR3QlJxW7tUgmVl8PS0WwUb4O694bOkA%3D&a
> mp;reserved=0
> >
> > Main changes v3 --> v4:
> > - Update the yaml to fix syntax error, add maxitems and drop
> > description of phy
> > - Correct the clock name in PHY DT node.
> > - Squash the EVK board relalted dts changes into one patch, and drop
> the
> > useless dummy clock and gpio suffix in DT nodes.
> > - Add board specific de-emphasis parameters as DT properties. Thus
> each board
> > can specify its actual de-emphasis values.
> > - Update the commit log of PHY driver.
> > - Remove the useless codes from PCIe driver, since they are moved to
> > PHY driver
> > - After the discussion and verification of the CLKREQ# configurations
> with Tim,
> > agree to add an optional boolean property "fsl,clkreq-unsupported",
> indicates
> > the CLKREQ# signal is hooked or not in HW designs.
> > - Add "Tested-by: Marcel Ziswiler <marcel.ziswiler@xxxxxxxxxxx>" tag,
> since
> > Marcel help to test the v3 patch-set.
> >
> > Main changes v2 --> v3:
> > - Regarding Lucas' comments.
> > - to have a whole view to review the patches, send out the i.MX8MM
> PCIe support too.
> > - move the PHY related bits manipulations of the GPR/SRC to
> standalone PHY driver.
> > - split the dts changes to SOC and board DT, and use the enum instead
> of raw value.
> > - update the license of the dt-binding header file.
> >
> > Changes v1 --> v2:
> > - Update the license of the dt-binding header file to make the license
> > compatible with dts files.
> > - Fix the dt_binding_check errors.
> >
> > Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 6
> +++
> > Documentation/devicetree/bindings/phy/fsl,imx8-pcie-phy.yaml | 95
> +++++++++++++++++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi |
> 55 +++++++++++++++++++
> > arch/arm64/boot/dts/freescale/imx8mm.dtsi |
> 46 +++++++++++++++-
> > drivers/pci/controller/dwc/pci-imx6.c |
> 73 ++++++++++++++++++++++---
> > drivers/phy/freescale/Kconfig |
> 9 ++++
> > drivers/phy/freescale/Makefile |
> 1 +
> > drivers/phy/freescale/phy-fsl-imx8m-pcie.c |
> 234
> +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
> +++++++++++++++++++++
> > include/dt-bindings/phy/phy-imx8-pcie.h |
> 14 +++++
> > 9 files changed, 525 insertions(+), 8 deletions(-)
> >
> > [PATCH v4 1/8] dt-bindings: phy: phy-imx8-pcie: Add binding for the
> > [PATCH v4 2/8] dt-bindings: phy: Add imx8 pcie phy driver support
> > [PATCH v4 3/8] dt-bindings: imx6q-pcie: Add PHY phandles and name
> > [PATCH v4 4/8] arm64: dts: imx8mm: Add the pcie phy support [PATCH
> v4
> > 5/8] phy: freescale: pcie: Initialize the imx8 pcie [PATCH v4 6/8]
> > arm64: dts: imx8mm: Add the pcie support [PATCH v4 7/8] arm64: dts:
> > imx8mm-evk: Add the pcie support on imx8mm [PATCH v4 8/8] PCI:
> imx:
> > Add the imx8mm pcie support
>
> Richard,
>
> For your v4 series:
>
> Reviewed-By: Tim Harvey <tharvey@xxxxxxxxxxxxx>
> Tested-By: Tim Harvey <tharvey@xxxxxxxxxxxxx>
>
> I tested this on imx8mm-venice* boards with no CLKREQ# support as well
> as an imx8mm-evk board.
>
[Richard Zhu] Thanks a lot.

Best Regards
Richard Zhu

> Thanks again for your effort on this series!
>
> Best regards,
>
> Tim