Re: [PATCH v2 8/8] irqchip: Add support for Sunplus SP7021 interrupt controller
From: kernel test robot
Date: Sat Oct 30 2021 - 15:31:16 EST
Hi Qin,
I love your patch! Yet something to improve:
[auto build test ERROR on robh/for-next]
[also build test ERROR on pza/reset/next clk/clk-next linus/master v5.15-rc7]
[cannot apply to tip/irq/core next-20211029]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211029-171054
base: https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
config: arm-allyesconfig (attached as .config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/0day-ci/linux/commit/91ab876ddb6d1a596c50c43a79d3e06b9695dee7
git remote add linux-review https://github.com/0day-ci/linux
git fetch --no-tags linux-review Qin-Jian/Add-Sunplus-SP7021-SoC-Support/20211029-171054
git checkout 91ab876ddb6d1a596c50c43a79d3e06b9695dee7
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross ARCH=arm
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>
All errors (new ones prefixed by >>):
>> drivers/irqchip/irq-sp7021-intc.c:211:5: error: no previous prototype for 'sp_intc_xlate_of' [-Werror=missing-prototypes]
211 | int sp_intc_xlate_of(struct irq_domain *d, struct device_node *node,
| ^~~~~~~~~~~~~~~~
>> drivers/irqchip/irq-sp7021-intc.c:274:12: error: no previous prototype for 'sp_intc_init_dt' [-Werror=missing-prototypes]
274 | int __init sp_intc_init_dt(
| ^~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
vim +/sp_intc_xlate_of +211 drivers/irqchip/irq-sp7021-intc.c
210
> 211 int sp_intc_xlate_of(struct irq_domain *d, struct device_node *node,
212 const u32 *intspec, unsigned int intsize,
213 irq_hw_number_t *out_hwirq, unsigned int *out_type)
214 {
215 int ret;
216
217 ret = irq_domain_xlate_twocell(d, node,
218 intspec, intsize, out_hwirq, out_type);
219 if (!ret) {
220 /* intspec[1]: IRQ_TYPE | SP_INTC_EXT_INT
221 * SP_INTC_EXT_INT: 0-1,
222 * to indicate route to which parent irq: EXT_INT0/EXT_INT1
223 */
224 u32 ext_int = (intspec[1] & SP_INTC_EXT_INT_MASK) >> SP_INTC_EXT_INT_SHFIT;
225
226 /* priority = 0, route to EXT_INT1
227 * otherwise, route to EXT_INT0
228 */
229 sp_intc_set_priority(*out_hwirq, 1 - ext_int);
230 }
231
232 return ret;
233 }
234
235 static struct irq_chip sp_intc_chip = {
236 .name = "sp_intc",
237 .irq_ack = sp_intc_ack_irq,
238 .irq_mask = sp_intc_mask_irq,
239 .irq_unmask = sp_intc_unmask_irq,
240 .irq_set_type = sp_intc_set_type,
241 };
242
243 static int sp_intc_irq_domain_map(struct irq_domain *domain,
244 unsigned int irq, irq_hw_number_t hwirq)
245 {
246 irq_set_chip_and_handler(irq, &sp_intc_chip, handle_level_irq);
247 irq_set_chip_data(irq, &sp_intc_chip);
248 irq_set_noprobe(irq);
249
250 return 0;
251 }
252
253 static const struct irq_domain_ops sp_intc_dm_ops = {
254 .xlate = sp_intc_xlate_of,
255 .map = sp_intc_irq_domain_map,
256 };
257
258 #ifdef CONFIG_OF
259 static int sp_intc_irq_map(struct device_node *node, int i)
260 {
261 sp_intc.virq[i] = irq_of_parse_and_map(node, i);
262 if (!sp_intc.virq[i]) {
263 pr_err("%s: missed EXT_INT%d in DT\n", __func__, i);
264 return -ENOENT;
265 }
266
267 pr_info("%s: EXT_INT%d = %d\n", __func__, i, sp_intc.virq[i]);
268 irq_set_chained_handler_and_data(sp_intc.virq[i],
269 sp_intc_handle_ext_cascaded, (void *)i);
270
271 return 0;
272 }
273
> 274 int __init sp_intc_init_dt(
275 struct device_node *node, struct device_node *parent)
276 {
277 void __iomem *base0, *base1;
278
279 base0 = of_iomap(node, 0);
280 if (!base0) {
281 pr_err("unable to map sp-intc base 0\n");
282 return -EINVAL;
283 }
284
285 base1 = of_iomap(node, 1);
286 if (!base1) {
287 pr_err("unable to map sp-intc base 1\n");
288 return -EINVAL;
289 }
290
291 sp_intc.node = node;
292
293 sp_intc_chip_init(base0, base1);
294
295 sp_intc.domain = irq_domain_add_linear(node,
296 SP_INTC_HWIRQ_MAX - SP_INTC_HWIRQ_MIN,
297 &sp_intc_dm_ops, &sp_intc);
298 if (!sp_intc.domain) {
299 pr_err("%s: unable to create linear domain\n", __func__);
300 return -EINVAL;
301 }
302
303 raw_spin_lock_init(&sp_intc.lock);
304
305 if (parent) {
306 /* secondary chained controller */
307 if (sp_intc_irq_map(node, 0)) // EXT_INT0
308 return -ENOENT;
309
310 if (sp_intc_irq_map(node, 1)) // EXT_INT1
311 return -ENOENT;
312 } else {
313 /* primary controller */
314 set_handle_irq(sp_intc_handle_irq);
315 }
316
317 return 0;
318 }
319 IRQCHIP_DECLARE(sp_intc, "sunplus,sp7021-intc", sp_intc_init_dt);
320 #endif
321
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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