Re: [PATCH v9 3/3] clk: lan966x: Add lan966x SoC clock driver

From: Stephen Boyd
Date: Tue Nov 02 2021 - 17:52:55 EST


Quoting Kavyasree Kotagiri (2021-10-19 00:40:30)
> diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
> new file mode 100644
> index 000000000000..19bec94e1551
> --- /dev/null
> +++ b/drivers/clk/clk-lan966x.c
> @@ -0,0 +1,240 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/*
> + * Microchip LAN966x SoC Clock driver.
> + *
> + * Copyright (C) 2021 Microchip Technology, Inc. and its subsidiaries
> + *
> + * Author: Kavyasree Kotagiri <kavyasree.kotagiri@xxxxxxxxxxxxx>
> + */
> +
> +#include <linux/bitfield.h>
> +#include <linux/clk-provider.h>
> +#include <linux/io.h>
> +#include <linux/kernel.h>
> +#include <linux/module.h>
> +#include <linux/of.h>
> +#include <linux/platform_device.h>
> +#include <linux/slab.h>
> +
> +#include <dt-bindings/clock/microchip,lan966x.h>
> +
> +#define GCK_ENA BIT(0)
> +#define GCK_SRC_SEL GENMASK(9, 8)
> +#define GCK_PRESCALER GENMASK(23, 16)
> +
> +#define DIV_MAX 255
> +
> +static const char *clk_names[N_CLOCKS] = {
> + "qspi0", "qspi1", "qspi2", "sdmmc0",
> + "pi", "mcan0", "mcan1", "flexcom0",
> + "flexcom1", "flexcom2", "flexcom3",
> + "flexcom4", "timer1", "usb_refclk",
> +};
> +
> +struct lan966x_gck {
> + struct clk_hw hw;
> + void __iomem *reg;
> +};
> +#define to_lan966x_gck(hw) container_of(hw, struct lan966x_gck, hw)
> +
> +static const struct clk_parent_data lan966x_gck_pdata[] = {
> + { .fw_name = "cpu_clk", .name = "cpu_clk" },

name shouldn't be required if the binding is new. That's the case
right?


> + { .fw_name = "ddr_clk", .name = "ddr_clk" },
> + { .fw_name = "sys_clk", .name = "sys_clk" },
> +};
> +