[PATCH v2] usb: xhci: add LWP quirk for ensuring uPD720201 into D3 state after S5

[Yinbo Zhu]

After S5, any pci device should into D3 state that if supported, but the
uPD720201 was not and cause OSPM power consumption is more higher that
S5 than S4. Due to that uPD720201 firmware behavior was unknown and the
_PS3 method wasn't implemented in ACPI table which can make device into
D3, I think xhci HCD can add a quirk ensure it into D3 state after S5
that is appropriate and this patch was to add the XHCI_LWP_QURIK and set
PCI_D3hot to uPD720201 pmsc register in xhci_pci_shutdown to fix xhci
power consumption issue.

Signed-off-by: Yinbo Zhu <zhuyinbo@xxxxxxxxxxx>
---
Change in v2:
		1. Rework the commit information to explain the issue 
		   reason.
		2. Change the qurik name that replace XHCI_LPM_QUIRK 
		   with XHCI_LWP_QUIRK.


 drivers/usb/host/xhci-pci.c | 4 +++-
 drivers/usb/host/xhci.h     | 1 +
 2 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 2c9f25c..9f3f7f9 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -265,6 +265,7 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
 	    pdev->device == 0x0014) {
 		xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 		xhci->quirks |= XHCI_ZERO_64B_REGS;
+		xhci->quirks |= XHCI_LWP_QUIRK;
 	}
 	if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
 	    pdev->device == 0x0015) {
@@ -608,7 +609,8 @@ static void xhci_pci_shutdown(struct usb_hcd *hcd)
 	xhci_shutdown(hcd);
 
 	/* Yet another workaround for spurious wakeups at shutdown with HSW */
-	if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
+	if (xhci->quirks & XHCI_SPURIOUS_WAKEUP ||
+			xhci->quirks & XHCI_LWP_QUIRK)
 		pci_set_power_state(pdev, PCI_D3hot);
 }
 #endif /* CONFIG_PM */
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index dca6181..bcd70d1 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1899,6 +1899,7 @@ struct xhci_hcd {
 #define XHCI_SG_TRB_CACHE_SIZE_QUIRK	BIT_ULL(39)
 #define XHCI_NO_SOFT_RETRY	BIT_ULL(40)
 #define XHCI_BROKEN_D3COLD	BIT_ULL(41)
+#define XHCI_LWP_QUIRK		BIT_ULL(42)
 
 	unsigned int		num_active_eps;
 	unsigned int		limit_active_eps;
-- 
1.8.3.1