On Wed, Nov 3, 2021 at 2:26 PM Kefeng Wang <wangkefeng.wang@xxxxxxxxxx> wrote:...
Add architecture specific implementation details for KFENCE and enable
KFENCE on ARM. In particular, this implements the required interface in
<asm/kfence.h>.
KFENCE requires that attributes for pages from its memory pool can
individually be set. Therefore, force the kfence pool to be mapped
at page granularity.
Testing this patch using the testcases in kfence_test.c and all passed
with or without ARM_LPAE.
Signed-off-by: Kefeng Wang <wangkefeng.wang@xxxxxxxxxx>
Sure. Let's wait some time to see whether there are any other comments,diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index f7ab6dabe89f..49148b675b43 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -17,6 +17,7 @@
#include <linux/sched/debug.h>
#include <linux/highmem.h>
#include <linux/perf_event.h>
+#include <linux/kfence.h>
#include <asm/system_misc.h>
#include <asm/system_info.h>
@@ -99,6 +100,11 @@ void show_pte(const char *lvl, struct mm_struct *mm, unsigned long addr)
{ }
#endif /* CONFIG_MMU */
+static inline bool is_write_fault(unsigned int fsr)
+{
+ return (fsr & FSR_WRITE) && !(fsr & FSR_CM);
+}
Please don't increase the diff by moving the code around. Consider
putting is_write_fault() in the right place in "ARM: mm: Provide
is_write_fault()" instead.
.