Re: [RFC PATCH] net: phy/mdio: enable mmd indirect access through phy_mii_ioctl()

[Sean Anderson]

On 11/2/21 7:38 PM, Russell King (Oracle) wrote:
> On Tue, Nov 02, 2021 at 03:46:13PM -0400, Sean Anderson wrote:
> > I have not found this to be the case. As soon as you need to access
> > something using phylink, the emulated registers make the ioctls useless
> > (especially because there may be multiple phy-like devices for one
> > interface).
>
> I think you're fundamentally misunderstanding something there.
>
> If there is a PHY present, phylink presents no different an interface
> from phylib - it does no emulation what so ever, and you can access any
> address. I use this on Macchiatobin when researching the 88x3310 PHY. I
> have a tool that allows me to view part of the register set in any MMD
> in almost real-time - and I can access either of the two PHYs on the
> xmdio bus from either of their network interfaces. Same for the clause
> 22 mdio bus. There is no emulation in this case, and you get full
> access to the MDIO/XMDIO bus just like via phylib. There is absolutely
> no difference.
>
> If there is no PHY connected, then phylink will emulate the accesses
> in just the same way as the fixed-phy support emulates accesses, and
> in a bug-compatible way with fixed-phy. It only emulates for PHY
> address 0. As there is no PHY, there is no MII bus known to phylink,
> so it there is no MII bus for phylink to pass any non-zero address on
> to.
>
> Split PCS support is relatively new, and this brings with it a whole
> host of issues:
>
> 1) the PCS may not be on a MII bus, and may not even have a PHY-like
>     set of registers. How do we export that kind of setup through the
>     MII ioctls?
>
> 2) when we have a copper SFP plugged in with its own PHY, we export it
>     through the MII ioctls because phylink now has a PHY (so it falls
>     in the "PHY present" case above). If we also have a PCS on a MII
>     bus, we now have two completely different MII buses. Which MII bus
>     do we export?
>
> 3) in the non-SFP case, the PHY and PCS may be sitting on different
>     MII buses. Again, which MII bus do we export?
>
> The MII ioctls have no way to indicate which MII bus should be
> accessed.  We can't just look at the address - what if the PHY and PCS
> are at the same address but on different buses?
>
> We may have cases where the PHY and PCS are sitting on the same MII bus
> - and in that case, phylink does not restrict whether you can access
> the PCS through the MII ioctls.
>
> Everything other case is "complicated" and unless we can come up with
> a sane way to fit everything into two or more buses into these
> antequated ioctls that are designed for a single MII bus, it's probably
> best not to even bodge something at the phylink level - it probably
> makes more sense for the network driver to do it. After all, the
> network driver probably has more knowledge about the hardware around it
> than phylink does.

I am specifically objecting to the statement

> The current API is good enough you can use it for debug

Because for debugging purposes, the current API is simply inadequate. As
you note above, there are many cases where there is no obvious mapping
between a single network interface and a single PHY on a single MDIO
bus. For this reason, it is necessary to allow userspace access to any
address on any MDIO bus for debugging.

Even a read-only debugfs interface would be useful, but from what I can
tell, such patches have been NAK'd. I find this very frustrating. I have
no opinion on the proposed patch above (due to the ioctl interface's
more fundamental issues, which you note). You will continue to get
patches trying to extend MDIO access until there is better debug
access.

--Sean