Re: [PATCH V7] irqchip/sifive-plic: Fixup EOI failed when masked

[Nikita Shubin]

Hello, Aurelien!

On Sat, 6 Nov 2021 13:11:51 +0100
Aurelien Jarno <aurelien@xxxxxxxxxxx> wrote:

> On 2021-11-05 17:47, guoren@xxxxxxxxxx wrote:
> > From: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
> > 
> > When using "devm_request_threaded_irq(,,,,IRQF_ONESHOT,,)" in the
> > driver, only the first interrupt could be handled, and continue irq
> > is blocked by hw. Because the riscv plic couldn't complete masked
> > irq source which has been disabled in enable register. The bug was
> > firstly reported in [1].
> > 
> > Here is the description of Interrupt Completion in PLIC spec [2]:
> > 
> > The PLIC signals it has completed executing an interrupt handler by
> > writing the interrupt ID it received from the claim to the
> > claim/complete register. The PLIC does not check whether the
> > completion ID is the same as the last claim ID for that target. If
> > the completion ID does not match an interrupt source that is
> > currently enabled for the target, the ^^ ^^^^^^^^^ ^^^^^^^
> > completion is silently ignored.
> > 
> > [1]
> > http://lists.infradead.org/pipermail/linux-riscv/2021-July/007441.html
> > [2]
> > https://github.com/riscv/riscv-plic-spec/blob/8bc15a35d07c9edf7b5d23fec9728302595ffc4d/riscv-plic.adoc
> > 
> > Fixes: bb0fed1c60cc ("irqchip/sifive-plic: Switch to fasteoi flow")
> > Reported-by: Vincent Pelletier <plr.vincent@xxxxxxxxx>
> > Tested-by: Nikita Shubin <nikita.shubin@xxxxxxxxxxx>
> > Signed-off-by: Guo Ren <guoren@xxxxxxxxxxxxxxxxx>
> > Cc: stable@xxxxxxxxxxxxxxx
> > Cc: Anup Patel <anup@xxxxxxxxxxxxxx>
> > Cc: Thomas Gleixner <tglx@xxxxxxxxxxxxx>
> > Cc: Marc Zyngier <maz@xxxxxxxxxx>
> > Cc: Palmer Dabbelt <palmer@xxxxxxxxxxx>
> > Cc: Atish Patra <atish.patra@xxxxxxx>
> > Cc: Nikita Shubin <nikita.shubin@xxxxxxxxxxx>
> > Cc: incent Pelletier <plr.vincent@xxxxxxxxx>  
> 
> Thanks for this patch. From what I understand, it fixes among other
> things the possibility to read the DA9063 RTC more than once.

Well RTC works definitely, through you need some patch to use it as a
wakeup source:

https://lkml.org/lkml/2021/11/1/800

and, AFAIK currently SiFive Unmatched lack's PM.

I still haven't tested the Watchdog and Onkey.

> 
> Does it means that we could now enable it in the device tree? I mean
> something like the following patch that unfortunately I can't test
> now:

Adding RTC is really useful and adding Watchdog along with Onkey
shouldn't make any harm.

> 
> diff --git a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts
> b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts index
> 2e4ea84f27e7..c357b48582f7 100644 ---
> a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts +++
> b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts @@ -70,6 +70,10
> @@ pmic@58 { interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
>  		interrupt-controller;
>  
> +		onkey {
> +			compatible = "dlg,da9063-onkey";
> +		};
> +
>  		regulators {
>  			vdd_bcore1: bcore1 {
>  				regulator-min-microvolt = <900000>;
> @@ -205,6 +209,14 @@ vdd_ldo11: ldo11 {
>  				regulator-always-on;
>  			};
>  		};
> +
> +		rtc {
> +			compatible = "dlg,da9063-rtc";
> +		};
> +
> +		wdt {
> +			compatible = "dlg,da9063-watchdog";
> +		};
>  	};
>  };
>