Re: [PATCH] clk: imx8mn: Fix imx8mn_clko1_sels
From: Abel Vesa
Date: Mon Nov 22 2021 - 08:32:29 EST
On 21-11-17 07:32:02, Adam Ford wrote:
> When attempting to use sys_pll1_80m as the parent for clko1, the
> system hangs. This is due to the fact that the source select
> for sys_pll1_80m was incorrectly pointing to m7_alt_pll_clk, which
> doesn't yet exist.
>
> According to Rev 3 of the TRM, The imx8mn_clko1_sels also incorrectly
> references an osc_27m which does not exist, nor does an entry for
> source select bits 010b. Fix both by inserting a dummy clock into
> the missing space in the table and renaming the incorrectly name clock
> with dummy.
>
> Fixes: 96d6392b54db ("clk: imx: Add support for i.MX8MN clock driver")
> Signed-off-by: Adam Ford <aford173@xxxxxxxxx>
>
Applied, thanks.
> diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
> index c55577604e16..021355a24708 100644
> --- a/drivers/clk/imx/clk-imx8mn.c
> +++ b/drivers/clk/imx/clk-imx8mn.c
> @@ -277,9 +277,9 @@ static const char * const imx8mn_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audi
>
> static const char * const imx8mn_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
>
> -static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m",
> - "sys_pll1_200m", "audio_pll2_out", "vpu_pll",
> - "sys_pll1_80m", };
> +static const char * const imx8mn_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "dummy",
> + "sys_pll1_200m", "audio_pll2_out", "sys_pll2_500m",
> + "dummy", "sys_pll1_80m", };
> static const char * const imx8mn_clko2_sels[] = {"osc_24m", "sys_pll2_200m", "sys_pll1_400m",
> "sys_pll2_166m", "sys_pll3_out", "audio_pll1_out",
> "video_pll1_out", "osc_32k", };
> --
> 2.32.0
>