Re: [PATCH v3 2/3] arm64: dts: apple: t8103: Fix PCIe #PERST polarity

[Mark Kettenis]

> From: Marc Zyngier <maz@xxxxxxxxxx>
> Date: Tue, 23 Nov 2021 18:06:35 +0000
> 
> As the name indicates, #PERST is active low. So fix the DT description
> to match the HW behaviour.
> 
> Fixes: ff2a8d91d80c ("arm64: apple: Add PCIe node")
> Signed-off-by: Marc Zyngier <maz@xxxxxxxxxx>

Reviewed-by: Mark Kettenis <kettenis@xxxxxxxxxxx>

> ---
>  arch/arm64/boot/dts/apple/t8103.dtsi | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi
> index fc8b2bb06ffe..e22c9433d5e0 100644
> --- a/arch/arm64/boot/dts/apple/t8103.dtsi
> +++ b/arch/arm64/boot/dts/apple/t8103.dtsi
> @@ -7,6 +7,7 @@
>   * Copyright The Asahi Linux Contributors
>   */
>  
> +#include <dt-bindings/gpio/gpio.h>
>  #include <dt-bindings/interrupt-controller/apple-aic.h>
>  #include <dt-bindings/interrupt-controller/irq.h>
>  #include <dt-bindings/pinctrl/apple.h>
> @@ -281,7 +282,7 @@ pcie0: pcie@690000000 {
>  			port00: pci@0,0 {
>  				device_type = "pci";
>  				reg = <0x0 0x0 0x0 0x0 0x0>;
> -				reset-gpios = <&pinctrl_ap 152 0>;
> +				reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
>  				max-link-speed = <2>;
>  
>  				#address-cells = <3>;
> @@ -301,7 +302,7 @@ port00: pci@0,0 {
>  			port01: pci@1,0 {
>  				device_type = "pci";
>  				reg = <0x800 0x0 0x0 0x0 0x0>;
> -				reset-gpios = <&pinctrl_ap 153 0>;
> +				reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
>  				max-link-speed = <2>;
>  
>  				#address-cells = <3>;
> @@ -321,7 +322,7 @@ port01: pci@1,0 {
>  			port02: pci@2,0 {
>  				device_type = "pci";
>  				reg = <0x1000 0x0 0x0 0x0 0x0>;
> -				reset-gpios = <&pinctrl_ap 33 0>;
> +				reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
>  				max-link-speed = <1>;
>  
>  				#address-cells = <3>;
> -- 
> 2.30.2
> 
>