Re: [DROP][PATCH] KVM: x86/xcr0: Don't make XFEATURE_MASK_SSE a mandatory bit setting

From: Like Xu
Date: Thu Jan 20 2022 - 07:01:20 EST


On 19/1/2022 11:23 pm, Dave Hansen wrote:
On 1/18/22 11:04 PM, Like Xu wrote:
Remove the XFEATURE_MASK_SSE bit as part of the XFEATURE_MASK_EXTEND
and opportunistically, move it into the context of its unique user KVM.

Is this a problem for xstate_required_size()? The rules for the CPUID
sub-functions <=1 are different than those for >1. Most importantly,
'eax' doesn't enumerate the size of the feature for the XFEATURE_SSE
sub-leaf.

Indeed.


I think XFEATURE_MASK_EXTEND was being used to avoid that oddity:

It seems that the cpuid.0xd.0.ebx size update for the SSE+AVX state needs
to be triggered by setting bit 2 which is quite odd:

XCR0 = 001B, ebx=00000240
XCR0 = 011B, ebx=00000240
XCR0 = 111B, ebx=00000340

Thank you and sorry for the noise.


u32 xstate_required_size(u64 xstate_bv, bool compacted)
{
int feature_bit = 0;
u32 ret = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;

xstate_bv &= XFEATURE_MASK_EXTEND;
while (xstate_bv) {
if (xstate_bv & 0x1) {
u32 eax, ebx, ecx, edx, offset;
cpuid_count(0xD, feature_bit, &eax, &ebx, &ecx, &edx);
/* ECX[1]: 64B alignment in compacted form */
if (compacted)
offset = (ecx & 0x2) ? ALIGN(ret, 64) : ret;
else
offset = ebx;
ret = max(ret, offset + eax);
}

xstate_bv >>= 1;
feature_bit++;
}

return ret;
}