Re: [PATCH v2 08/11] PCI: mvebu: Use child_ops API

[Pali Rohár]

On Thursday 20 January 2022 10:49:05 Rob Herring wrote:
> On Wed, Jan 12, 2022 at 04:18:11PM +0100, Pali Rohár wrote:
> > Split struct pci_ops between ops and child_ops. Member ops is used for
> > accessing PCIe Root Ports via pci-bridge-emul.c driver and child_ops for
> > accessing real PCIe cards.
> > 
> > There is no need to mix these two struct pci_ops into one as PCI core code
> > already provides separate callbacks via bridge->ops and bridge->child_ops.
> > 
> > Signed-off-by: Pali Rohár <pali@xxxxxxxxxx>
> > ---
> >  drivers/pci/controller/pci-mvebu.c | 82 ++++++++++++++++--------------
> >  1 file changed, 44 insertions(+), 38 deletions(-)
> > 
> > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
> > index 9ea2f6a7c2b0..1e90ab888075 100644
> > --- a/drivers/pci/controller/pci-mvebu.c
> > +++ b/drivers/pci/controller/pci-mvebu.c
> > @@ -294,11 +294,29 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
> >  	mvebu_writel(port, mask, PCIE_MASK_OFF);
> >  }
> >  
> > -static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port,
> > -				 struct pci_bus *bus,
> > -				 u32 devfn, int where, int size, u32 *val)
> > +static struct mvebu_pcie_port *mvebu_pcie_find_port(struct mvebu_pcie *pcie,
> > +						    struct pci_bus *bus,
> > +						    int devfn);
> > +
> > +static int mvebu_pcie_child_rd_conf(struct pci_bus *bus, u32 devfn, int where,
> > +				    int size, u32 *val)
> >  {
> > -	void __iomem *conf_data = port->base + PCIE_CONF_DATA_OFF;
> > +	struct mvebu_pcie *pcie = bus->sysdata;
> > +	struct mvebu_pcie_port *port;
> > +	void __iomem *conf_data;
> > +
> > +	port = mvebu_pcie_find_port(pcie, bus, devfn);
> > +	if (!port) {
> > +		*val = 0xffffffff;
> > +		return PCIBIOS_DEVICE_NOT_FOUND;
> > +	}
> > +
> > +	if (!mvebu_pcie_link_up(port)) {
> > +		*val = 0xffffffff;
> > +		return PCIBIOS_DEVICE_NOT_FOUND;
> > +	}
> > +
> > +	conf_data = port->base + PCIE_CONF_DATA_OFF;
> >  
> >  	mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where),
> >  		     PCIE_CONF_ADDR_OFF);
> > @@ -321,11 +339,21 @@ static int mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port,
> >  	return PCIBIOS_SUCCESSFUL;
> >  }
> >  
> > -static int mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port,
> > -				 struct pci_bus *bus,
> > -				 u32 devfn, int where, int size, u32 val)
> > +static int mvebu_pcie_child_wr_conf(struct pci_bus *bus, u32 devfn,
> > +				    int where, int size, u32 val)
> >  {
> > -	void __iomem *conf_data = port->base + PCIE_CONF_DATA_OFF;
> > +	struct mvebu_pcie *pcie = bus->sysdata;
> > +	struct mvebu_pcie_port *port;
> > +	void __iomem *conf_data;
> > +
> 
> > +	port = mvebu_pcie_find_port(pcie, bus, devfn);
> > +	if (!port)
> > +		return PCIBIOS_DEVICE_NOT_FOUND;
> > +
> > +	if (!mvebu_pcie_link_up(port))
> > +		return PCIBIOS_DEVICE_NOT_FOUND;
> > +
> > +	conf_data = port->base + PCIE_CONF_DATA_OFF;
> 
> Again, the same setup code in read and write is a sign to use 
> .map_bus(). You can copy it from my version I pointed you to.
> 
> Rob

I'm planning to do other cleanup in followup patches. But there are too
many mvebu and aardvark patches on the list waiting, and I do not want
to send another batch.